1 # SPDX-License-Identifier: GPL-2.0
2 config PPC_CELL
3 	select PPC_64S_HASH_MMU if PPC64
4 	bool
5 
6 config PPC_CELL_COMMON
7 	bool
8 	select PPC_CELL
9 	select PPC_DCR_MMIO
10 	select PPC_INDIRECT_PIO
11 	select PPC_INDIRECT_MMIO
12 	select PPC_HASH_MMU_NATIVE
13 	select PPC_RTAS
14 	select IRQ_EDGE_EOI_HANDLER
15 
16 config PPC_CELL_NATIVE
17 	bool
18 	select PPC_CELL_COMMON
19 	select MPIC
20 	select PPC_IO_WORKAROUNDS
21 	select IBM_EMAC_EMAC4 if IBM_EMAC
22 	select IBM_EMAC_RGMII if IBM_EMAC
23 	select IBM_EMAC_ZMII if IBM_EMAC #test only
24 	select IBM_EMAC_TAH if IBM_EMAC  #test only
25 
26 config PPC_IBM_CELL_BLADE
27 	bool "IBM Cell Blade"
28 	depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
29 	select PPC_CELL_NATIVE
30 	select PPC_OF_PLATFORM_PCI
31 	select FORCE_PCI
32 	select MMIO_NVRAM
33 	select PPC_UDBG_16550
34 	select UDBG_RTAS_CONSOLE
35 
36 config AXON_MSI
37 	bool
38 	depends on PPC_IBM_CELL_BLADE && PCI_MSI
39 	select IRQ_DOMAIN_NOMAP
40 	default y
41 
42 menu "Cell Broadband Engine options"
43 	depends on PPC_CELL
44 
45 config SPU_FS
46 	tristate "SPU file system"
47 	default m
48 	depends on PPC_CELL
49 	depends on COREDUMP
50 	select SPU_BASE
51 	help
52 	  The SPU file system is used to access Synergistic Processing
53 	  Units on machines implementing the Broadband Processor
54 	  Architecture.
55 
56 config SPU_BASE
57 	bool
58 	select PPC_COPRO_BASE
59 
60 config CBE_RAS
61 	bool "RAS features for bare metal Cell BE"
62 	depends on PPC_CELL_NATIVE
63 	default y
64 
65 config PPC_IBM_CELL_RESETBUTTON
66 	bool "IBM Cell Blade Pinhole reset button"
67 	depends on CBE_RAS && PPC_IBM_CELL_BLADE
68 	default y
69 	help
70 	  Support Pinhole Resetbutton on IBM Cell blades.
71 	  This adds a method to trigger system reset via front panel pinhole button.
72 
73 config PPC_IBM_CELL_POWERBUTTON
74 	tristate "IBM Cell Blade power button"
75 	depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV
76 	default y
77 	help
78 	  Support Powerbutton on IBM Cell blades.
79 	  This will enable the powerbutton as an input device.
80 
81 config CBE_THERM
82 	tristate "CBE thermal support"
83 	default m
84 	depends on CBE_RAS && SPU_BASE
85 
86 config PPC_PMI
87 	tristate
88 	default y
89 	depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON
90 	help
91 	  PMI (Platform Management Interrupt) is a way to
92 	  communicate with the BMC (Baseboard Management Controller).
93 	  It is used in some IBM Cell blades.
94 
95 config CBE_CPUFREQ_SPU_GOVERNOR
96 	tristate "CBE frequency scaling based on SPU usage"
97 	depends on SPU_FS && CPU_FREQ
98 	default m
99 	help
100 	  This governor checks for spu usage to adjust the cpu frequency.
101 	  If no spu is running on a given cpu, that cpu will be throttled to
102 	  the minimal possible frequency.
103 
104 endmenu
105