1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SPI Controller
8
9description:
10  The Rockchip SPI controller is used to interface with various devices such
11  as flash and display controllers using the SPI communication interface.
12
13allOf:
14  - $ref: spi-controller.yaml#
15
16maintainers:
17  - Heiko Stuebner <heiko@sntech.de>
18
19# Everything else is described in the common file
20properties:
21  compatible:
22    oneOf:
23      - const: rockchip,rk3036-spi
24      - const: rockchip,rk3066-spi
25      - const: rockchip,rk3228-spi
26      - const: rockchip,rv1108-spi
27      - items:
28          - enum:
29              - rockchip,px30-spi
30              - rockchip,rk3128-spi
31              - rockchip,rk3188-spi
32              - rockchip,rk3288-spi
33              - rockchip,rk3308-spi
34              - rockchip,rk3328-spi
35              - rockchip,rk3368-spi
36              - rockchip,rk3399-spi
37              - rockchip,rk3568-spi
38              - rockchip,rk3576-spi
39              - rockchip,rk3588-spi
40              - rockchip,rv1126-spi
41          - const: rockchip,rk3066-spi
42
43  reg:
44    maxItems: 1
45
46  interrupts:
47    maxItems: 1
48
49  clocks:
50    items:
51      - description: transfer-clock
52      - description: peripheral clock
53
54  clock-names:
55    items:
56      - const: spiclk
57      - const: apb_pclk
58
59  dmas:
60    items:
61      - description: TX DMA Channel
62      - description: RX DMA Channel
63
64  dma-names:
65    items:
66      - const: tx
67      - const: rx
68
69  rx-sample-delay-ns:
70    default: 0
71    description:
72      Nano seconds to delay after the SCLK edge before sampling Rx data
73      (may need to be fine tuned for high capacitance lines).
74      If not specified 0 will be used.
75
76  pinctrl-names:
77    minItems: 1
78    items:
79      - const: default
80      - const: sleep
81    description:
82      Names for the pin configuration(s); may be "default" or "sleep",
83      where the "sleep" configuration may describe the state
84      the pins should be in during system suspend.
85
86  power-domains:
87    maxItems: 1
88
89required:
90  - compatible
91  - reg
92  - interrupts
93  - clocks
94  - clock-names
95
96unevaluatedProperties: false
97
98examples:
99  - |
100    #include <dt-bindings/clock/rk3188-cru-common.h>
101    #include <dt-bindings/interrupt-controller/arm-gic.h>
102    #include <dt-bindings/interrupt-controller/irq.h>
103    spi0: spi@ff110000 {
104      compatible = "rockchip,rk3066-spi";
105      reg = <0xff110000 0x1000>;
106      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
107      clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
108      clock-names = "spiclk", "apb_pclk";
109      dmas = <&pdma1 11>, <&pdma1 12>;
110      dma-names = "tx", "rx";
111      pinctrl-0 = <&spi1_pins>;
112      pinctrl-1 = <&spi1_sleep>;
113      pinctrl-names = "default", "sleep";
114      rx-sample-delay-ns = <10>;
115      #address-cells = <1>;
116      #size-cells = <0>;
117    };
118