1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm crypto engine driver
8
9maintainers:
10  - Bhupesh Sharma <bhupesh.sharma@linaro.org>
11
12description:
13  This document defines the binding for the QCE crypto
14  controller found on Qualcomm parts.
15
16properties:
17  compatible:
18    oneOf:
19      - const: qcom,crypto-v5.1
20        deprecated: true
21        description: Kept only for ABI backward compatibility
22
23      - const: qcom,crypto-v5.4
24        deprecated: true
25        description: Kept only for ABI backward compatibility
26
27      - items:
28          - enum:
29              - qcom,ipq4019-qce
30              - qcom,sm8150-qce
31          - const: qcom,qce
32
33      - items:
34          - enum:
35              - qcom,ipq6018-qce
36              - qcom,ipq8074-qce
37              - qcom,ipq9574-qce
38              - qcom,msm8996-qce
39              - qcom,qcm2290-qce
40              - qcom,sdm845-qce
41              - qcom,sm6115-qce
42          - const: qcom,ipq4019-qce
43          - const: qcom,qce
44
45      - items:
46          - enum:
47              - qcom,sc7280-qce
48              - qcom,sm6350-qce
49              - qcom,sm8250-qce
50              - qcom,sm8350-qce
51              - qcom,sm8450-qce
52              - qcom,sm8550-qce
53              - qcom,sm8650-qce
54          - const: qcom,sm8150-qce
55          - const: qcom,qce
56
57  reg:
58    maxItems: 1
59
60  clocks:
61    minItems: 1
62    maxItems: 3
63
64  clock-names:
65    minItems: 1
66    maxItems: 3
67
68  iommus:
69    minItems: 1
70    maxItems: 8
71    description:
72      phandle to apps_smmu node with sid mask.
73
74  interconnects:
75    maxItems: 1
76    description:
77      Interconnect path between qce crypto and main memory.
78
79  interconnect-names:
80    const: memory
81
82  dmas:
83    items:
84      - description: DMA specifiers for rx dma channel.
85      - description: DMA specifiers for tx dma channel.
86
87  dma-names:
88    items:
89      - const: rx
90      - const: tx
91
92allOf:
93  - if:
94      properties:
95        compatible:
96          contains:
97            enum:
98              - qcom,crypto-v5.1
99              - qcom,crypto-v5.4
100              - qcom,ipq6018-qce
101              - qcom,ipq8074-qce
102              - qcom,ipq9574-qce
103              - qcom,msm8996-qce
104              - qcom,sdm845-qce
105    then:
106      properties:
107        clocks:
108          maxItems: 3
109        clock-names:
110          items:
111            - const: iface
112            - const: bus
113            - const: core
114      required:
115        - clocks
116        - clock-names
117
118  - if:
119      properties:
120        compatible:
121          contains:
122            enum:
123              - qcom,qcm2290-qce
124              - qcom,sm6115-qce
125    then:
126      properties:
127        clocks:
128          maxItems: 1
129        clock-names:
130          items:
131            - const: core
132      required:
133        - clocks
134        - clock-names
135
136  - if:
137      properties:
138        compatible:
139          contains:
140            enum:
141              - qcom,sm8150-qce
142    then:
143      properties:
144        clocks: false
145        clock-names: false
146
147required:
148  - compatible
149  - reg
150  - dmas
151  - dma-names
152
153additionalProperties: false
154
155examples:
156  - |
157    #include <dt-bindings/clock/qcom,gcc-apq8084.h>
158    crypto-engine@fd45a000 {
159        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
160        reg = <0xfd45a000 0x6000>;
161        clocks = <&gcc GCC_CE2_AHB_CLK>,
162                 <&gcc GCC_CE2_AXI_CLK>,
163                 <&gcc GCC_CE2_CLK>;
164        clock-names = "iface", "bus", "core";
165        dmas = <&cryptobam 2>, <&cryptobam 3>;
166        dma-names = "rx", "tx";
167        iommus = <&apps_smmu 0x584 0x0011>,
168                 <&apps_smmu 0x586 0x0011>,
169                 <&apps_smmu 0x594 0x0011>,
170                 <&apps_smmu 0x596 0x0011>;
171    };
172