1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * LPC variant I/O for Microchip EC 4 * 5 * Copyright (C) 2016 Google, Inc 6 */ 7 8 #ifndef __CROS_EC_LPC_MEC_H 9 #define __CROS_EC_LPC_MEC_H 10 11 #include <linux/acpi.h> 12 13 enum cros_ec_lpc_mec_emi_access_mode { 14 /* 8-bit access */ 15 ACCESS_TYPE_BYTE = 0x0, 16 /* 16-bit access */ 17 ACCESS_TYPE_WORD = 0x1, 18 /* 32-bit access */ 19 ACCESS_TYPE_LONG = 0x2, 20 /* 21 * 32-bit access, read or write of MEC_EMI_EC_DATA_B3 causes the 22 * EC data register to be incremented. 23 */ 24 ACCESS_TYPE_LONG_AUTO_INCREMENT = 0x3, 25 }; 26 27 enum cros_ec_lpc_mec_io_type { 28 MEC_IO_READ, 29 MEC_IO_WRITE, 30 }; 31 32 /* EMI registers are relative to base */ 33 #define MEC_EMI_HOST_TO_EC(MEC_EMI_BASE) ((MEC_EMI_BASE) + 0) 34 #define MEC_EMI_EC_TO_HOST(MEC_EMI_BASE) ((MEC_EMI_BASE) + 1) 35 #define MEC_EMI_EC_ADDRESS_B0(MEC_EMI_BASE) ((MEC_EMI_BASE) + 2) 36 #define MEC_EMI_EC_ADDRESS_B1(MEC_EMI_BASE) ((MEC_EMI_BASE) + 3) 37 #define MEC_EMI_EC_DATA_B0(MEC_EMI_BASE) ((MEC_EMI_BASE) + 4) 38 #define MEC_EMI_EC_DATA_B1(MEC_EMI_BASE) ((MEC_EMI_BASE) + 5) 39 #define MEC_EMI_EC_DATA_B2(MEC_EMI_BASE) ((MEC_EMI_BASE) + 6) 40 #define MEC_EMI_EC_DATA_B3(MEC_EMI_BASE) ((MEC_EMI_BASE) + 7) 41 42 /** 43 * cros_ec_lpc_mec_init() - Initialize MEC I/O. 44 * 45 * @base: MEC EMI Base address 46 * @end: MEC EMI End address 47 */ 48 void cros_ec_lpc_mec_init(unsigned int base, unsigned int end); 49 50 /** 51 * cros_ec_lpc_mec_acpi_mutex() - Find and set ACPI mutex for MEC 52 * 53 * @adev: Parent ACPI device 54 * @pathname: Name of AML mutex 55 * @return: Negative error code, or zero for success 56 */ 57 int cros_ec_lpc_mec_acpi_mutex(struct acpi_device *adev, const char *pathname); 58 59 /** 60 * cros_ec_lpc_mec_in_range() - Determine if addresses are in MEC EMI range. 61 * 62 * @offset: Address offset 63 * @length: Number of bytes to check 64 * 65 * Return: 1 if in range, 0 if not, and -EINVAL on failure 66 * such as the mec range not being initialized 67 */ 68 int cros_ec_lpc_mec_in_range(unsigned int offset, unsigned int length); 69 70 /** 71 * cros_ec_lpc_io_bytes_mec - Read / write bytes to MEC EMI port 72 * 73 * @io_type: MEC_IO_READ or MEC_IO_WRITE, depending on request 74 * @offset: Base read / write address 75 * @length: Number of bytes to read / write 76 * @buf: Destination / source buffer 77 * 78 * @return: A negative error code on error, or 8-bit checksum of all 79 * bytes read / written 80 */ 81 int cros_ec_lpc_io_bytes_mec(enum cros_ec_lpc_mec_io_type io_type, 82 unsigned int offset, unsigned int length, u8 *buf); 83 84 #endif /* __CROS_EC_LPC_MEC_H */ 85