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/linux-6.12.1/Documentation/devicetree/bindings/mips/lantiq/
Drcu.txt4 This binding describes the RCU (reset controller unit) multifunction device,
5 where each sub-device has its own set of registers.
14 -------------------------------------------------------------------------------
16 - compatible : The first and second values must be:
17 "lantiq,xrx200-rcu", "simple-mfd", "syscon"
18 - reg : The address and length of the system control registers
21 -------------------------------------------------------------------------------
22 Example of the RCU bindings on a xRX200 SoC:
24 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
27 big-endian;
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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-lantiq-rcu-usb2.txt9 -------------------------------------------------------------------------------
11 - compatible : Should be one of
12 "lantiq,ase-usb2-phy"
13 "lantiq,danube-usb2-phy"
14 "lantiq,xrx100-usb2-phy"
15 "lantiq,xrx200-usb2-phy"
16 "lantiq,xrx300-usb2-phy"
17 - reg : Defines the following sets of registers in the parent
19 - Offset of the USB PHY configuration register
20 - Offset of the USB Analog configuration
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/linux-6.12.1/Documentation/devicetree/bindings/net/dsa/
Dlantiq,gswip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Hauke Mehrtens <hauke@hauke-m.de>
18 - lantiq,xrx200-gswip
19 - lantiq,xrx300-gswip
20 - lantiq,xrx330-gswip
26 reg-names:
28 - const: switch
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/linux-6.12.1/Documentation/devicetree/bindings/reset/
Dlantiq,reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/lantiq,reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lantiq XWAY SoC RCU reset controller
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 This binding describes a reset-controller found on the RCU module on Lantiq
19 - lantiq,danube-reset
20 - lantiq,xrx200-reset
25 Offset of the reset set register
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Dintel,rcu-gw.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/intel,rcu-gw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: System Reset Controller on Intel Gateway SoCs
10 - Dilip Kota <eswara.kota@linux.intel.com>
15 - intel,rcu-lgm
16 - intel,rcu-xrx200
19 description: Reset controller registers.
22 intel,global-reset:
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/linux-6.12.1/drivers/phy/lantiq/
Dphy-lantiq-rcu-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
19 #include <linux/reset.h>
21 /* Transmitter HS Pre-Emphasis Enable */
69 .compatible = "lantiq,ase-usb2-phy",
73 .compatible = "lantiq,danube-usb2-phy",
77 .compatible = "lantiq,xrx100-usb2-phy",
81 .compatible = "lantiq,xrx200-usb2-phy",
85 .compatible = "lantiq,xrx300-usb2-phy",
96 if (priv->reg_bits->have_ana_cfg) { in ltq_rcu_usb2_phy_init()
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/linux-6.12.1/drivers/reset/
Dreset-lantiq.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
7 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
13 #include <linux/reset-controller.h>
43 ret = regmap_read(priv->regmap, priv->status_offset, &val); in lantiq_rcu_reset_status()
63 } while (--retry); in lantiq_rcu_reset_status_timeout()
65 return -ETIMEDOUT; in lantiq_rcu_reset_status_timeout()
76 ret = regmap_update_bits(priv->regmap, priv->reset_offset, BIT(set), in lantiq_rcu_reset_update()
79 dev_err(priv->dev, "Failed to set reset bit %u\n", set); in lantiq_rcu_reset_update()
86 dev_err(priv->dev, "Failed to %s bit %u\n", in lantiq_rcu_reset_update()
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Dreset-intel-gw.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/reset-controller.h>
39 .name = "intel-reset",
47 * Reset status register offset relative to
48 * the reset control register(X) is X + 4
57 if (data->soc_data->legacy) in id_to_reg_and_bit_offsets()
62 if (data->soc_data->legacy && *rst_req == RCU_RST_REQ) in id_to_reg_and_bit_offsets()
78 ret = regmap_update_bits(data->regmap, rst_req, BIT(req_bit), val); in intel_set_clr_bits()
82 return regmap_read_poll_timeout(data->regmap, rst_stat, val, in intel_set_clr_bits()
95 dev_err(data->dev, "Reset assert failed %d\n", ret); in intel_assert_device()
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/linux-6.12.1/Documentation/devicetree/bindings/usb/
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
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/linux-6.12.1/drivers/net/dsa/
Dlantiq_gswip.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2017 - 2019 Hauke Mehrtens <hauke@hauke-m.de>
44 #include <linux/reset.h>
46 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
64 #define GSWIP_MDIO_PHYp(p) (0x15 - (p))
123 #define GSWIP_SWRES_R1 BIT(1) /* GSWIP Software reset */
124 #define GSWIP_SWRES_R0 BIT(0) /* GSWIP Hardware reset */
135 #define GSWIP_BM_RAM_VAL(x) (0x043 - (x))
149 #define GSWIP_BM_CTRL_RMON_RAM1_RES BIT(0) /* Software Reset for RMON RAM 1 */
150 #define GSWIP_BM_CTRL_RMON_RAM2_RES BIT(1) /* Software Reset for RMON RAM 2 */
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/linux-6.12.1/drivers/usb/dwc2/
Dparams.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2004-2016 Synopsys, Inc.
20 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_bcm_params()
22 p->host_rx_fifo_size = 774; in dwc2_set_bcm_params()
23 p->max_transfer_size = 65535; in dwc2_set_bcm_params()
24 p->max_packet_count = 511; in dwc2_set_bcm_params()
25 p->ahbcfg = 0x10; in dwc2_set_bcm_params()
30 struct dwc2_core_params *p = &hsotg->params; in dwc2_set_his_params()
32 p->otg_caps.hnp_support = false; in dwc2_set_his_params()
33 p->otg_caps.srp_support = false; in dwc2_set_his_params()
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/linux-6.12.1/net/dsa/
Dport.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2017 Savoir-faire Linux Inc.
22 * dsa_port_notify - Notify the switching fabric of changes to a port
25 * @v: event-specific value.
29 * reconfigure themselves for cross-chip operations. Can also be used to
35 return dsa_tree_notify(dp->ds->dst, e, v); in dsa_port_notify()
57 struct dsa_switch *ds = dp->ds; in dsa_port_fast_age()
59 if (!ds->ops->port_fast_age) in dsa_port_fast_age()
62 ds->ops->port_fast_age(ds, dp->index); in dsa_port_fast_age()
70 struct dsa_switch *ds = dp->ds; in dsa_port_vlan_fast_age()
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