/linux-6.12.1/arch/hexagon/kernel/ |
D | vm_init_segtable.S | 40 #define X __HVM_PDE_S_INVALID macro 47 .word X,X,X,X 48 .word X,X,X,X 49 .word X,X,X,X 50 .word X,X,X,X 51 .word X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X 52 .word X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X 53 .word X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X 54 .word X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X 55 .word X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X [all …]
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/linux-6.12.1/arch/powerpc/crypto/ |
D | crct10dif-vpmsum_asm.S | 21 /* x^261184 mod p(x), x^261120 mod p(x) */ 24 /* x^260160 mod p(x), x^260096 mod p(x) */ 27 /* x^259136 mod p(x), x^259072 mod p(x) */ 30 /* x^258112 mod p(x), x^258048 mod p(x) */ 33 /* x^257088 mod p(x), x^257024 mod p(x) */ 36 /* x^256064 mod p(x), x^256000 mod p(x) */ 39 /* x^255040 mod p(x), x^254976 mod p(x) */ 42 /* x^254016 mod p(x), x^253952 mod p(x) */ 45 /* x^252992 mod p(x), x^252928 mod p(x) */ 48 /* x^251968 mod p(x), x^251904 mod p(x) */ [all …]
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D | crc32c-vpmsum_asm.S | 17 /* x^261120 mod p(x)` << 1, x^261184 mod p(x)` << 1 */ 20 /* x^260096 mod p(x)` << 1, x^260160 mod p(x)` << 1 */ 23 /* x^259072 mod p(x)` << 1, x^259136 mod p(x)` << 1 */ 26 /* x^258048 mod p(x)` << 1, x^258112 mod p(x)` << 1 */ 29 /* x^257024 mod p(x)` << 1, x^257088 mod p(x)` << 1 */ 32 /* x^256000 mod p(x)` << 1, x^256064 mod p(x)` << 1 */ 35 /* x^254976 mod p(x)` << 1, x^255040 mod p(x)` << 1 */ 38 /* x^253952 mod p(x)` << 1, x^254016 mod p(x)` << 1 */ 41 /* x^252928 mod p(x)` << 1, x^252992 mod p(x)` << 1 */ 44 /* x^251904 mod p(x)` << 1, x^251968 mod p(x)` << 1 */ [all …]
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/linux-6.12.1/fs/bcachefs/ |
D | errcode.h | 6 x(ERANGE, ERANGE_option_too_small) \ 7 x(ERANGE, ERANGE_option_too_big) \ 8 x(EINVAL, mount_option) \ 9 x(BCH_ERR_mount_option, option_name) \ 10 x(BCH_ERR_mount_option, option_value) \ 11 x(BCH_ERR_mount_option, option_not_bool) \ 12 x(ENOMEM, ENOMEM_stripe_buf) \ 13 x(ENOMEM, ENOMEM_replicas_table) \ 14 x(ENOMEM, ENOMEM_cpu_replicas) \ 15 x(ENOMEM, ENOMEM_replicas_gc) \ [all …]
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D | sb-errors_format.h | 14 x(clean_but_journal_not_empty, 0, 0) \ 15 x(dirty_but_no_journal_entries, 1, 0) \ 16 x(dirty_but_no_journal_entries_post_drop_nonflushes, 2, 0) \ 17 x(sb_clean_journal_seq_mismatch, 3, 0) \ 18 x(sb_clean_btree_root_mismatch, 4, 0) \ 19 x(sb_clean_missing, 5, 0) \ 20 x(jset_unsupported_version, 6, 0) \ 21 x(jset_unknown_csum, 7, 0) \ 22 x(jset_last_seq_newer_than_seq, 8, 0) \ 23 x(jset_past_bucket_end, 9, 0) \ [all …]
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/linux-6.12.1/drivers/phy/microchip/ |
D | sparx5_serdes_regs.h | 35 #define SD10G_LANE_LANE_01_CFG_PMA_TX_CK_BITWIDTH_2_0_SET(x)\ argument 36 FIELD_PREP(SD10G_LANE_LANE_01_CFG_PMA_TX_CK_BITWIDTH_2_0, x) 37 #define SD10G_LANE_LANE_01_CFG_PMA_TX_CK_BITWIDTH_2_0_GET(x)\ argument 38 FIELD_GET(SD10G_LANE_LANE_01_CFG_PMA_TX_CK_BITWIDTH_2_0, x) 41 #define SD10G_LANE_LANE_01_CFG_RXDET_EN_SET(x)\ argument 42 FIELD_PREP(SD10G_LANE_LANE_01_CFG_RXDET_EN, x) 43 #define SD10G_LANE_LANE_01_CFG_RXDET_EN_GET(x)\ argument 44 FIELD_GET(SD10G_LANE_LANE_01_CFG_RXDET_EN, x) 47 #define SD10G_LANE_LANE_01_CFG_RXDET_STR_SET(x)\ argument 48 FIELD_PREP(SD10G_LANE_LANE_01_CFG_RXDET_STR, x) [all …]
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D | lan966x_serdes_regs.h | 21 #define HSIO_SD_CFG_PHY_RESET_SET(x)\ argument 22 FIELD_PREP(HSIO_SD_CFG_PHY_RESET, x) 23 #define HSIO_SD_CFG_PHY_RESET_GET(x)\ argument 24 FIELD_GET(HSIO_SD_CFG_PHY_RESET, x) 27 #define HSIO_SD_CFG_TX_RESET_SET(x)\ argument 28 FIELD_PREP(HSIO_SD_CFG_TX_RESET, x) 29 #define HSIO_SD_CFG_TX_RESET_GET(x)\ argument 30 FIELD_GET(HSIO_SD_CFG_TX_RESET, x) 33 #define HSIO_SD_CFG_TX_RATE_SET(x)\ argument 34 FIELD_PREP(HSIO_SD_CFG_TX_RATE, x) [all …]
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/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | rs600d.h | 33 #define S_000040_SCRATCH_INT_MASK(x) (((x) & 0x1) << 18) argument 34 #define G_000040_SCRATCH_INT_MASK(x) (((x) >> 18) & 0x1) argument 36 #define S_000040_GUI_IDLE_MASK(x) (((x) & 0x1) << 19) argument 37 #define G_000040_GUI_IDLE_MASK(x) (((x) >> 19) & 0x1) argument 39 #define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) argument 40 #define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) argument 42 #define S_000040_DMA_VIPH2_INT_EN(x) (((x) & 0x1) << 14) argument 43 #define G_000040_DMA_VIPH2_INT_EN(x) (((x) >> 14) & 0x1) argument 45 #define S_000040_DMA_VIPH3_INT_EN(x) (((x) & 0x1) << 15) argument 46 #define G_000040_DMA_VIPH3_INT_EN(x) (((x) >> 15) & 0x1) argument [all …]
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D | r100d.h | 69 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) argument 70 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) argument 72 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) argument 73 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) argument 75 #define S_0000F0_SOFT_RESET_SE(x) (((x) & 0x1) << 2) argument 76 #define G_0000F0_SOFT_RESET_SE(x) (((x) >> 2) & 0x1) argument 78 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) argument 79 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) argument 81 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) argument 82 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) argument [all …]
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D | rs690d.h | 34 #define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) argument 36 #define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) argument 37 #define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF) argument 39 #define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9) argument 40 #define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1) argument 43 #define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument 44 #define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument 47 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) argument 48 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) argument 51 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) argument [all …]
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D | rv515d.h | 210 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) argument 211 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) argument 213 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) argument 214 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) argument 216 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) argument 217 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) argument 219 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) argument 220 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) argument 222 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) argument 223 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) argument [all …]
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D | r300d.h | 70 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument 71 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument 73 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument 74 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument 77 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) argument 78 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) argument 80 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) argument 81 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) argument 84 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) argument 85 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) argument [all …]
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D | r420d.h | 32 #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0) argument 33 #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F) argument 35 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8) argument 36 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1) argument 39 #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument 40 #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument 43 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument 44 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument 46 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) argument 47 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) argument [all …]
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/linux-6.12.1/drivers/net/ethernet/microchip/sparx5/ |
D | sparx5_main_regs.h | 65 #define ANA_AC_RAM_INIT_RAM_INIT_SET(x)\ argument 66 FIELD_PREP(ANA_AC_RAM_INIT_RAM_INIT, x) 67 #define ANA_AC_RAM_INIT_RAM_INIT_GET(x)\ argument 68 FIELD_GET(ANA_AC_RAM_INIT_RAM_INIT, x) 71 #define ANA_AC_RAM_INIT_RAM_CFG_HOOK_SET(x)\ argument 72 FIELD_PREP(ANA_AC_RAM_INIT_RAM_CFG_HOOK, x) 73 #define ANA_AC_RAM_INIT_RAM_CFG_HOOK_GET(x)\ argument 74 FIELD_GET(ANA_AC_RAM_INIT_RAM_CFG_HOOK, x) 81 #define ANA_AC_OWN_UPSID_OWN_UPSID_SET(x)\ argument 82 FIELD_PREP(ANA_AC_OWN_UPSID_OWN_UPSID, x) [all …]
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/linux-6.12.1/drivers/gpu/drm/imagination/ |
D | pvr_rogue_fwif_sf.h | 65 #define ROGUE_FW_SF_GID(x) (((u32)(x) >> 12) & 0xfU) argument 67 #define ROGUE_FW_SF_PARAMNUM(x) (((u32)(x) >> 16) & 0xfU) argument 80 "Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x. Partial render:%d, CSW resume:%d, prio:%d" }, 82 "3D finished, HWRTData0State=%x, HWRTData1State=%x" }, 84 "Kick 3D TQ: FWCtx 0x%08.8x @ %d, CSW resume:%d, prio: %d" }, 88 "Kick Compute: FWCtx 0x%08.8x @ %d, prio: %d" }, 92 … "Kick TA: FWCtx 0x%08.8x @ %d, RTD 0x%08x. First kick:%d, Last kick:%d, CSW resume:%d, prio:%d" }, 100 "Out of memory! Context 0x%08x, HWRTData 0x%x" }, 102 "Kick TLA: FWCtx 0x%08.8x @ %d, prio:%d" }, 106 "cCCB Woff update = %d, DM = %d, FWCtx = 0x%08.8x" }, [all …]
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/linux-6.12.1/drivers/media/platform/verisilicon/ |
D | rockchip_vpu2_regs.h | 14 #define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16) argument 15 #define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) argument 17 #define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16) argument 18 #define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) argument 20 #define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16) argument 21 #define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) argument 23 #define VEPU_REG_VP8_QUT_ZB_DC_CHR(x) (((x) & 0x1ff) << 18) argument 24 #define VEPU_REG_VP8_QUT_ZB_DC_Y2(x) (((x) & 0x1ff) << 9) argument 25 #define VEPU_REG_VP8_QUT_ZB_DC_Y1(x) (((x) & 0x1ff) << 0) argument 27 #define VEPU_REG_VP8_QUT_ZB_AC_CHR(x) (((x) & 0x1ff) << 18) argument [all …]
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb/ |
D | regs.h | 36 #define V_CMDQ0_ENABLE(x) ((x) << S_CMDQ0_ENABLE) argument 40 #define V_CMDQ1_ENABLE(x) ((x) << S_CMDQ1_ENABLE) argument 44 #define V_FL0_ENABLE(x) ((x) << S_FL0_ENABLE) argument 48 #define V_FL1_ENABLE(x) ((x) << S_FL1_ENABLE) argument 52 #define V_CPL_ENABLE(x) ((x) << S_CPL_ENABLE) argument 56 #define V_RESPONSE_QUEUE_ENABLE(x) ((x) << S_RESPONSE_QUEUE_ENABLE) argument 61 #define V_CMDQ_PRIORITY(x) ((x) << S_CMDQ_PRIORITY) argument 62 #define G_CMDQ_PRIORITY(x) (((x) >> S_CMDQ_PRIORITY) & M_CMDQ_PRIORITY) argument 65 #define V_DISABLE_CMDQ0_GTS(x) ((x) << S_DISABLE_CMDQ0_GTS) argument 69 #define V_DISABLE_CMDQ1_GTS(x) ((x) << S_DISABLE_CMDQ1_GTS) argument [all …]
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/linux-6.12.1/lib/crypto/ |
D | chacha.c | 16 static void chacha_permute(u32 *x, int nrounds) in chacha_permute() argument 24 x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 16); in chacha_permute() 25 x[1] += x[5]; x[13] = rol32(x[13] ^ x[1], 16); in chacha_permute() 26 x[2] += x[6]; x[14] = rol32(x[14] ^ x[2], 16); in chacha_permute() 27 x[3] += x[7]; x[15] = rol32(x[15] ^ x[3], 16); in chacha_permute() 29 x[8] += x[12]; x[4] = rol32(x[4] ^ x[8], 12); in chacha_permute() 30 x[9] += x[13]; x[5] = rol32(x[5] ^ x[9], 12); in chacha_permute() 31 x[10] += x[14]; x[6] = rol32(x[6] ^ x[10], 12); in chacha_permute() 32 x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 12); in chacha_permute() 34 x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 8); in chacha_permute() [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/kernel/inc/vgpu/ |
D | rpc_global_enums.h | 6 #ifndef X 7 # define X(UNIT, RPC) NV_VGPU_MSG_FUNCTION_##RPC, macro 11 X(RM, NOP) // 0 enumerator 12 X(RM, SET_GUEST_SYSTEM_INFO) // 1 13 X(RM, ALLOC_ROOT) // 2 14 X(RM, ALLOC_DEVICE) // 3 deprecated 15 X(RM, ALLOC_MEMORY) // 4 16 X(RM, ALLOC_CTX_DMA) // 5 17 X(RM, ALLOC_CHANNEL_DMA) // 6 18 X(RM, MAP_MEMORY) // 7 [all …]
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/ |
D | regs.h | 5 #define V_CONGMODE(x) ((x) << S_CONGMODE) argument 9 #define V_TNLFLMODE(x) ((x) << S_TNLFLMODE) argument 13 #define V_FATLPERREN(x) ((x) << S_FATLPERREN) argument 17 #define V_DROPPKT(x) ((x) << S_DROPPKT) argument 21 #define V_EGRGENCTRL(x) ((x) << S_EGRGENCTRL) argument 26 #define V_USERSPACESIZE(x) ((x) << S_USERSPACESIZE) argument 30 #define V_HOSTPAGESIZE(x) ((x) << S_HOSTPAGESIZE) argument 33 #define V_FLMODE(x) ((x) << S_FLMODE) argument 38 #define V_PKTSHIFT(x) ((x) << S_PKTSHIFT) argument 41 #define V_ONEINTMULTQ(x) ((x) << S_ONEINTMULTQ) argument [all …]
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D | sge_defs.h | 11 #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS) argument 12 #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS) argument 15 #define V_EC_GTS(x) ((x) << S_EC_GTS) argument 20 #define V_EC_INDEX(x) ((x) << S_EC_INDEX) argument 21 #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX) argument 25 #define V_EC_SIZE(x) ((x) << S_EC_SIZE) argument 26 #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE) argument 30 #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO) argument 31 #define G_EC_BASE_LO(x) (((x) >> S_EC_BASE_LO) & M_EC_BASE_LO) argument 35 #define V_EC_BASE_HI(x) ((x) << S_EC_BASE_HI) argument [all …]
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/linux-6.12.1/drivers/net/ethernet/microchip/lan966x/ |
D | lan966x_regs.h | 38 #define AFI_PORT_FRM_OUT_FRM_OUT_CNT_SET(x)\ argument 39 FIELD_PREP(AFI_PORT_FRM_OUT_FRM_OUT_CNT, x) 40 #define AFI_PORT_FRM_OUT_FRM_OUT_CNT_GET(x)\ argument 41 FIELD_GET(AFI_PORT_FRM_OUT_FRM_OUT_CNT, x) 47 #define AFI_PORT_CFG_FC_SKIP_TTI_INJ_SET(x)\ argument 48 FIELD_PREP(AFI_PORT_CFG_FC_SKIP_TTI_INJ, x) 49 #define AFI_PORT_CFG_FC_SKIP_TTI_INJ_GET(x)\ argument 50 FIELD_GET(AFI_PORT_CFG_FC_SKIP_TTI_INJ, x) 53 #define AFI_PORT_CFG_FRM_OUT_MAX_SET(x)\ argument 54 FIELD_PREP(AFI_PORT_CFG_FRM_OUT_MAX, x) [all …]
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4/ |
D | t4_regs.h | 77 #define QID_V(x) ((x) << QID_S) argument 80 #define DBPRIO_V(x) ((x) << DBPRIO_S) argument 84 #define PIDX_V(x) ((x) << PIDX_S) argument 89 #define DBTYPE_V(x) ((x) << DBTYPE_S) argument 94 #define PIDX_T5_V(x) ((x) << PIDX_T5_S) argument 95 #define PIDX_T5_G(x) (((x) >> PIDX_T5_S) & PIDX_T5_M) argument 100 #define INGRESSQID_V(x) ((x) << INGRESSQID_S) argument 103 #define TIMERREG_V(x) ((x) << TIMERREG_S) argument 106 #define SEINTARM_V(x) ((x) << SEINTARM_S) argument 110 #define CIDXINC_V(x) ((x) << CIDXINC_S) argument [all …]
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/linux-6.12.1/tools/memory-model/ |
D | linux-kernel.def | 9 READ_ONCE(X) __load{once}(X) 10 WRITE_ONCE(X,V) { __store{once}(X,V); } 13 smp_store_release(X,V) { __store{release}(*X,V); } 14 smp_load_acquire(X) __load{acquire}(*X) 15 rcu_assign_pointer(X,V) { __store{release}(X,V); } 16 rcu_dereference(X) __load{once}(X) 17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; } 31 xchg(X,V) __xchg{mb}(X,V) 32 xchg_relaxed(X,V) __xchg{once}(X,V) 33 xchg_release(X,V) __xchg{release}(X,V) [all …]
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/linux-6.12.1/arch/mips/include/asm/sibyte/ |
D | bcm1480_mc.h | 31 #define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0) argument 32 #define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV0) argument 37 #define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1) argument 38 #define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV1) argument 43 #define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV2) argument 44 #define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV2, M_BCM1480_MC_INTLV2) argument 49 #define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS_MODE) argument 50 #define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_CS_MODE, M_BCM1480_MC_CS_MODE) argument 72 #define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_START) argument 73 #define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_START, M_BCM1480_MC_CS0_STAR… argument [all …]
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