| /linux-6.12.1/include/drm/intel/ |
| D | i915_hdcp_interface.h | 20 * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON
22 * @HDCP_PORT_TYPE_CPDP: HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3)
105 * @initiate_hdcp2_session: Initiate a Wired HDCP2.2 Tx Session.
119 * @close_hdcp_session: Close the Wired HDCP Tx session per port.
315 /* hdcp_command_id: Enumeration of all WIRED HDCP Command IDs */
322 /* The wired HDCP Tx commands */
373 * Data structures for integrated wired HDCP2 Tx in
376 /* HECI struct for integrated wired HDCP Tx session initiation. */
390 /* HECI struct for ending an integrated wired HDCP Tx session. */
401 /* HECI struct for integrated wired HDCP Tx Rx Cert verification. */
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| /linux-6.12.1/arch/mips/mm/ |
| D | tlb-r4k.c | 71 * If there are any wired entries, fall back to iterating in local_flush_tlb_all()
395 unsigned long wired; in add_wired_entry()
408 wired = num_wired_entries(); in add_wired_entry()
409 write_c0_wired(wired + 1); in add_wired_entry()
410 write_c0_index(wired); in add_wired_entry()
455 * don't actually want to add a wired entry which remains throughout the
467 unsigned long wired; in add_temporary_entry() local
476 wired = num_wired_entries(); in add_temporary_entry()
477 if (--temp_tlb_entry < wired) { in add_temporary_entry()
561 int wired = current_cpu_data.tlbsize - ntlb; in tlb_init() local
[all …]
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| D | tlb-r3k.c | 223 static unsigned long wired = 0; in add_wired_entry() local
225 if (wired < 8) { in add_wired_entry()
235 write_c0_index(wired); in add_wired_entry()
236 wired++; /* BARRIER */ in add_wired_entry()
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| D | init.c | 151 unsigned int wired; in kunmap_coherent() local
156 wired = num_wired_entries() - 1; in kunmap_coherent()
157 write_c0_wired(wired); in kunmap_coherent()
158 write_c0_index(wired); in kunmap_coherent()
159 write_c0_entryhi(UNIQUE_ENTRYHI(wired)); in kunmap_coherent()
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| /linux-6.12.1/arch/mips/include/asm/ |
| D | tlb.h | 16 unsigned int wired = read_c0_wired(); in num_wired_entries() local
19 wired &= MIPSR6_WIRED_WIRED; in num_wired_entries()
21 return wired; in num_wired_entries()
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| D | mmu_context.h | 78 * The ginvt instruction will invalidate wired entries when its type field
80 * allow the kernel to create wired entries with the MMID of current->active_mm
81 * then those wired entries could be invalidated when we later use ginvt to
84 * In order to prevent ginvt from trashing wired entries, we reserve one MMID
85 * for use by the kernel when creating wired entries. This MMID will never be
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| D | regdef.h | 22 #define GPR_ZERO 0 /* wired zero */
65 #define GPR_ZERO 0 /* wired zero */
112 #define zero $0 /* wired zero */
155 #define zero $0 /* wired zero */
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| /linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
| D | img,pdc-intc.txt | 82 * An SoC peripheral that is wired through the PDC.
85 // The interrupt controller that this device is wired to.
96 * An interrupt generating device that is wired to a SysWake pin.
99 // The interrupt controller that this device is wired to.
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| D | marvell,sei.txt | 10 AP and is wired while a second set comes from the CPs by the mean of
19 - #interrupt-cells: number of cells to define an SEI wired interrupt
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| D | riscv,aplic.yaml | 14 platform level interrupt controller (APLIC) for handling wired interrupts
51 Given APLIC domain forwards wired interrupts as MSIs to a AIA incoming
62 Specifies the number of wired interrupt sources supported by this
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| D | open-pic.txt | 81 * An interrupt generating device that is wired to an Open PIC.
89 // The interrupt controller that this device is wired to.
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| /linux-6.12.1/arch/arm/boot/dts/allwinner/ |
| D | sun8i-v3s-anbernic-rg-nano.dts | 183 /* DCDC2 wired into vdd-cpu, vdd-sys, and vdd-ephy. */
191 /* DCDC3 wired into every 3.3v input that isn't the RTC. */
199 /* LDO1 wired into RTC, voltage is hard-wired at 3.3v. */
205 /* LDO2 wired into VCC-PLL and audio codec. */
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| /linux-6.12.1/arch/sh/mm/ |
| D | tlb-urb.c | 39 * Insert this entry into the highest non-wired TLB slot (via in tlb_wire_entry()
62 * Unwire the last wired TLB entry.
82 * have been wired. in tlb_unwire_entry()
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| /linux-6.12.1/Documentation/devicetree/bindings/iio/resolver/ |
| D | adi,ad2s1210.yaml | 44 Note on SPI connections: The CS line on the AD2S1210 should hard-wired to
105 RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits
120 This is used to indicate the selected mode if A0 and A1 are hard-wired
130 RES1 are hard-wired to match this value.
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| /linux-6.12.1/arch/mips/sgi-ip30/ |
| D | ip30-common.h | 7 * Power Switch is wired via BaseIO BRIDGE slot #6.
9 * ACFail is wired via BaseIO BRIDGE slot #7.
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| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | st-rc.txt | 12 be present iff the rx pins are wired up.
15 be present iff the tx pins are wired up.
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| /linux-6.12.1/Documentation/devicetree/bindings/spi/ |
| D | spi-peripheral-props.yaml | 92 description: Several SPI memories can be wired in stacked mode.
104 description: Several SPI memories can be wired in parallel mode.
110 many busses as devices must be wired. The size of each chip should
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| /linux-6.12.1/arch/mips/kvm/ |
| D | vz.c | 2463 unsigned int wired = read_gc0_wired(); in kvm_vz_vcpu_save_wired() local
2467 /* Expand the wired TLB array if necessary */ in kvm_vz_vcpu_save_wired()
2468 wired &= MIPSR6_WIRED_WIRED; in kvm_vz_vcpu_save_wired()
2469 if (wired > vcpu->arch.wired_tlb_limit) { in kvm_vz_vcpu_save_wired()
2470 tlbs = krealloc(vcpu->arch.wired_tlb, wired * in kvm_vz_vcpu_save_wired()
2474 wired = vcpu->arch.wired_tlb_limit; in kvm_vz_vcpu_save_wired()
2477 vcpu->arch.wired_tlb_limit = wired; in kvm_vz_vcpu_save_wired()
2481 if (wired) in kvm_vz_vcpu_save_wired()
2482 /* Save wired entries from the guest TLB */ in kvm_vz_vcpu_save_wired()
2483 kvm_vz_save_guesttlb(vcpu->arch.wired_tlb, 0, wired); in kvm_vz_vcpu_save_wired()
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad4000.yaml | 77 Describes how the ADC SDI pin is wired. A value of "sdi" indicates that
79 pin is hard-wired to logic high (VIO). "low" indicates that it is
80 hard-wired low (GND). "cs" indicates that the ADC SDI pin is connected to
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| D | adi,ad7944.yaml | 111 line is hard-wired and the state is determined by the adi,always-turbo
118 When present, this property indicates that the TURBO line is hard-wired
120 present, the TURBO line is assumed to be hard-wired and the state is
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| /linux-6.12.1/drivers/input/joystick/ |
| D | xpad.c | 134 { 0x03f0, 0x038D, "HyperX Clutch", 0, XTYPE_XBOX360 }, /* wired */
191 { 0x0738, 0x4716, "Mad Catz Wired Xbox 360 Controller", 0, XTYPE_XBOX360 },
196 …{ 0x0738, 0x4738, "Mad Catz Wired Xbox 360 Controller (SFIV)", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX…
232 { 0x0e6f, 0x011f, "Rock Candy Gamepad Wired Controller", 0, XTYPE_XBOX360 },
234 { 0x0e6f, 0x0133, "Xbox 360 Wired Controller", 0, XTYPE_XBOX360 },
235 { 0x0e6f, 0x0139, "Afterglow Prismatic Wired Controller", 0, XTYPE_XBOXONE },
237 { 0x0e6f, 0x0146, "Rock Candy Wired Controller for Xbox One", 0, XTYPE_XBOXONE },
245 { 0x0e6f, 0x0201, "Pelican PL-3601 'TSZ' Wired Xbox 360 Controller", 0, XTYPE_XBOX360 },
251 { 0x0e6f, 0x02a2, "PDP Wired Controller for Xbox One - Crimson Red", 0, XTYPE_XBOXONE },
252 { 0x0e6f, 0x02a4, "PDP Wired Controller for Xbox One - Stealth Series", 0, XTYPE_XBOXONE },
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/display/bridge/ |
| D | sil,sii9022.yaml | 41 <0> if only I2S or S/PDIF pin is wired,
42 <1> if both are wired.
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| /linux-6.12.1/arch/arm/boot/dts/st/ |
| D | ste-href-tvk1281618-r2.dtsi | 101 * the falling edge if they could be wired together.
122 * the falling edge if they could be wired together.
159 * the falling edge if they could be wired together.
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| /linux-6.12.1/Documentation/hwmon/ |
| D | via686a.rst | 80 in which case the sensor inputs will not be wired. This is the case of
84 not wired for hardware monitoring.
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| /linux-6.12.1/Documentation/devicetree/bindings/net/dsa/ |
| D | mediatek,mt7530.yaml | 39 the gmac of the SoC which is wired to port 5 can connect to the PHY.
54 - For the multi-chip module MT7530, in case of an external phy wired to
63 - Port 5 can be wired to an external phy. Port 5 becomes a DSA user port.
65 For the multi-chip module MT7530, the external phy must be wired TX to TX
66 to gmac1 of the SoC for this to work. Ubiquiti EdgeRouter X SFP is wired
|