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/linux-6.12.1/arch/arm/mach-omap2/
Dvoltage.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP3/OMAP4 Voltage Management Routines
29 #include "prm-regbits-34xx.h"
30 #include "prm-regbits-44xx.h"
36 #include "voltage.h"
46 * voltdm_get_voltage() - Gets the current non-auto-compensated voltage
47 * @voltdm: pointer to the voltdm for which current voltage info is needed
49 * API to get the current non-auto-compensated voltage for a voltage domain.
50 * Returns 0 in case of error else returns the current voltage.
59 return voltdm->nominal_volt; in voltdm_get_voltage()
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/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/pwm-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
11 - Lee Jones <lee@kernel.org>
12 - Alexandre Courbot <acourbot@nvidia.com>
17 Voltage Table:
18 When in this mode, a voltage table (See below) of predefined voltage <=>
19 duty-cycle values must be provided via DT. Limitations are that the
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Drohm,bd71828-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
25 "^LDO[1-7]$":
32 regulator-name:
33 pattern: "^ldo[1-7]$"
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Drohm,bd71847-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must
23 voltage monitoring for LDO5/LDO6 can cause PMIC to reset.
30 "^LDO[1-6]$":
37 regulator-name:
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Drohm,bd71837-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not
23 if they are disabled at startup the voltage monitoring for LDO5/LDO6 will
31 "^LDO[1-7]$":
38 regulator-name:
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.c38 return (uint8_t) ((6200 - (vddc * VOLTAGE_SCALE)) / 25); in convert_to_vid()
43 return (uint16_t) ((6200 - (vid * 25)) / VOLTAGE_SCALE); in convert_to_vddc()
53 uint32_t *table; in phm_copy_clock_limits_array() local
56 table = kzalloc(array_size, GFP_KERNEL); in phm_copy_clock_limits_array()
57 if (NULL == table) in phm_copy_clock_limits_array()
58 return -ENOMEM; in phm_copy_clock_limits_array()
61 table[i] = le32_to_cpu(pptable_array[i]); in phm_copy_clock_limits_array()
63 *pptable_info_array = table; in phm_copy_clock_limits_array()
75 uint32_t *table; in phm_copy_overdrive_settings_limits_array() local
78 table = kzalloc(array_size, GFP_KERNEL); in phm_copy_overdrive_settings_limits_array()
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Dppatomctrl.c50 pp_atomctrl_mc_reg_table *table) in atomctrl_retrieve_ac_timing() argument
55 ((uint8_t *)reg_block + (2 * sizeof(uint16_t)) + le16_to_cpu(reg_block->usRegIndexTblSize)); in atomctrl_retrieve_ac_timing()
64 table->mc_reg_table_entry[num_ranges].mclk_max = in atomctrl_retrieve_ac_timing()
68 for (i = 0, j = 1; i < table->last; i++) { in atomctrl_retrieve_ac_timing()
69 if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing()
71 table->mc_reg_table_entry[num_ranges].mc_data[i] = in atomctrl_retrieve_ac_timing()
74 } else if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing()
77 table->mc_reg_table_entry[num_ranges].mc_data[i] = in atomctrl_retrieve_ac_timing()
78 table->mc_reg_table_entry[num_ranges].mc_data[i-1]; in atomctrl_retrieve_ac_timing()
85 ((uint8_t *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)) ; in atomctrl_retrieve_ac_timing()
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/linux-6.12.1/Documentation/devicetree/bindings/power/supply/
Dbattery.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
14 In smart batteries, these are typically stored in non-volatile memory
16 no appropriate non-volatile memory, or it is unprogrammed/incorrect.
27 Batteries must be referenced by chargers and/or fuel-gauges using a phandle.
28 The phandle's property should be named "monitored-battery".
32 const: simple-battery
34 device-chemistry:
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/linux-6.12.1/drivers/opp/
Dti-opp-supply.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
5 * Dave Gerlach <d-gerlach@ti.com>
26 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table
27 * @reference_uv: reference voltage (usually Nominal voltage)
28 * @optimized_uv: Optimized voltage from efuse
36 * struct ti_opp_supply_data - OMAP specific opp supply data
37 * @vdd_table: Optimized voltage mapping table
39 * @vdd_absolute_max_voltage_uv: absolute maximum voltage in UV for the supply
54 * struct ti_opp_supply_of_data - device tree match data
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/linux-6.12.1/include/linux/
Dpower_supply.h1 /* SPDX-License-Identifier: GPL-2.0-only */
226 /* Run-time specific power supply configuration */
349 int vbat_uv; /* Battery voltage in microvolt */
354 * struct power_supply_maintenance_charge_table - setting for maintenace charging
358 * reach this voltage the maintenance charging current is turned off. It is
359 * turned back on if we fall below this voltage.
360 * @charge_voltage_max_uv: maintenance charging voltage that is usually a bit
362 * charge_current_max_ua until we get back up to this voltage.
366 * maintenance charge current and voltage pair in respective array and wait
387 * +-------------------------------------------------------------------> t
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/linux-6.12.1/drivers/regulator/
Dhelpers.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 // helpers.c -- Voltage/Current Regulator framework helper functions.
20 * regulator_is_enabled_regmap - standard is_enabled() for regmap users
33 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); in regulator_is_enabled_regmap()
37 val &= rdev->desc->enable_mask; in regulator_is_enabled_regmap()
39 if (rdev->desc->enable_is_inverted) { in regulator_is_enabled_regmap()
40 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
41 return val != rdev->desc->enable_val; in regulator_is_enabled_regmap()
44 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
45 return val == rdev->desc->enable_val; in regulator_is_enabled_regmap()
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Dpwm-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 - STMicroelectronics Inc.
31 /* Voltage table */
52 * Voltage table call-backs
61 pwm_get_state(drvdata->pwm, &pwm_state); in pwm_regulator_init_state()
64 for (i = 0; i < rdev->desc->n_voltages; i++) { in pwm_regulator_init_state()
65 if (dutycycle == drvdata->duty_cycle_table[i].dutycycle) { in pwm_regulator_init_state()
66 drvdata->state = i; in pwm_regulator_init_state()
76 if (drvdata->state < 0) in pwm_regulator_get_voltage_sel()
79 return drvdata->state; in pwm_regulator_get_voltage_sel()
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/linux-6.12.1/Documentation/userspace-api/media/cec/
Dcec-ioc-dqevent.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 CEC_DQEVENT - Dequeue a CEC event
35 non-blocking mode and no event is pending, then it will return -1 and
38 The internal event queues are per-filehandle and per-event type. If
43 two :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` events with
51 .. flat-table:: struct cec_event_state_change
52 :header-rows: 0
53 :stub-columns: 0
56 * - __u16
57 - ``phys_addr``
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/linux-6.12.1/drivers/clk/tegra/
Dcvb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Utility functions for parsing Tegra CVB voltage tables
5 * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved.
20 mv = DIV_ROUND_CLOSEST(cvb->c2 * speedo, s_scale); in get_cvb_voltage()
21 mv = DIV_ROUND_CLOSEST((mv + cvb->c1) * speedo, s_scale) + cvb->c0; in get_cvb_voltage()
28 /* combined: apply voltage scale and round to cvb alignment step */ in round_cvb_voltage()
30 int step = (align->step_uv ? : 1000) * v_scale; in round_cvb_voltage()
31 int offset = align->offset_uv * v_scale; in round_cvb_voltage()
33 uv = max(mv * 1000, offset) - offset; in round_cvb_voltage()
34 uv = DIV_ROUND_UP(uv, step) * align->step_uv + align->offset_uv; in round_cvb_voltage()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c70 for (i = 0; i < context->stream_count; i++) { in vg_get_active_display_cnt_wa()
71 const struct dc_stream_state *stream = context->streams[i]; in vg_get_active_display_cnt_wa()
73 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A || in vg_get_active_display_cnt_wa()
74 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK || in vg_get_active_display_cnt_wa()
75 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK) in vg_get_active_display_cnt_wa()
79 for (i = 0; i < dc->link_count; i++) { in vg_get_active_display_cnt_wa()
80 const struct dc_link *link = dc->links[i]; in vg_get_active_display_cnt_wa()
83 if (link->link_enc->funcs->is_dig_enabled && in vg_get_active_display_cnt_wa()
84 link->link_enc->funcs->is_dig_enabled(link->link_enc)) in vg_get_active_display_cnt_wa()
100 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in vg_update_clocks()
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/linux-6.12.1/include/linux/regulator/
Ddriver.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * driver.h -- SoC Regulator driver support.
44 /* Hardware shut down voltage outputs if condition is detected */
57 * struct regulator_ops - regulator operations.
64 * @set_voltage: Set the voltage for the regulator within the range specified.
65 * The driver should select the voltage closest to min_uV.
66 * @set_voltage_sel: Set the voltage for the regulator using the specified
68 * @map_voltage: Convert a voltage into a selector
69 * @get_voltage: Return the currently configured voltage for the regulator;
70 * return -ENOTRECOVERABLE if regulator can't be read at
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c47 clk_mgr->base.base.ctx->logger
65 for (i = 0; i < context->stream_count; i++) { in dcn315_get_active_display_cnt_wa()
66 const struct dc_stream_state *stream = context->streams[i]; in dcn315_get_active_display_cnt_wa()
68 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A || in dcn315_get_active_display_cnt_wa()
69 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK || in dcn315_get_active_display_cnt_wa()
70 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK) in dcn315_get_active_display_cnt_wa()
74 for (i = 0; i < dc->link_count; i++) { in dcn315_get_active_display_cnt_wa()
75 const struct dc_link *link = dc->links[i]; in dcn315_get_active_display_cnt_wa()
78 if (link->link_enc && link->link_enc->funcs->is_dig_enabled && in dcn315_get_active_display_cnt_wa()
79 link->link_enc->funcs->is_dig_enabled(link->link_enc)) in dcn315_get_active_display_cnt_wa()
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/linux-6.12.1/drivers/thermal/
Ddevfreq_cooling.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014-2015 ARM Limited
9 * - If OPPs are added or removed after devfreq cooling has
28 * struct devfreq_cooling_device - Devfreq cooling device
34 * @freq_table: Pointer to a table with the frequencies sorted in descending
35 * order. You can index the table by cooling device state
67 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_max_state()
69 *state = dfc->max_state; in devfreq_cooling_get_max_state()
77 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_cur_state()
79 *state = dfc->cooling_state; in devfreq_cooling_get_cur_state()
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c83 /* 35W - XT, XTL */
96 /* 25W - PRO, LE */
111 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_start_smc()
119 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_reset_smc()
127 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_stop_smc_clock()
134 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_start_smc_clock()
147 /* de-assert reset */ in iceland_smu_start_smc()
164 …PP_ASSERT_WITH_CODE((limit >= byte_count), "SMC address is beyond the SMC RAM area.", return -EINV… in iceland_upload_smc_firmware_data()
166 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); in iceland_upload_smc_firmware_data()
167 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); in iceland_upload_smc_firmware_data()
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Dvegam_smumgr.c88 return -ENOMEM; in vegam_smu_init()
90 hwmgr->smu_backend = smu_data; in vegam_smu_init()
94 return -EINVAL; in vegam_smu_init()
108 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
116 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0); in vegam_start_smu_in_protection_mode()
118 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
121 /* De-assert reset */ in vegam_start_smu_in_protection_mode()
122 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
137 if (1 != PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
139 PP_ASSERT_WITH_CODE(false, "SMU Firmware start failed!", return -1); in vegam_start_smu_in_protection_mode()
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/linux-6.12.1/Documentation/devicetree/bindings/opp/
Dopp-v2-base.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 Devices work at voltage-current-frequency combinations and some implementations
25 pattern: '^opp-table(-[a-z0-9]+)?$'
27 opp-shared:
29 Indicates that device nodes using this OPP Table Node's phandle switch
30 their DVFS state together, i.e. they share clock/voltage/current lines.
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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dnvidia,tegra124-dfll.txt4 Documentation/devicetree/bindings/clock/clock-bindings.txt
7 the fast CPU cluster. It consists of a free-running voltage controlled
8 oscillator connected to the CPU voltage rail (VDD_CPU), and a closed loop
9 control module that will automatically adjust the VDD_CPU voltage by
10 communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
13 - compatible : should be one of:
14 - "nvidia,tegra124-dfll": for Tegra124
15 - "nvidia,tegra210-dfll": for Tegra210
16 - reg : Defines the following set of registers, in the order listed:
17 - registers for the DFLL control logic.
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/linux-6.12.1/drivers/comedi/drivers/
Ddt2815.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
20 * [0] - I/O port base base address
21 * [1] - IRQ (unused)
22 * [2] - Voltage unipolar/bipolar configuration
23 * 0 == unipolar 5V (0V -- +5V)
24 * 1 == bipolar 5V (-5V -- +5V)
25 * [3] - Current offset configuration
26 * 0 == disabled (0mA -- +32mAV)
27 * 1 == enabled (+4mA -- +20mAV)
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/linux-6.12.1/Documentation/devicetree/bindings/thermal/
Dgeneric-adc-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/thermal/generic-adc-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laxman Dewangan <ldewangan@nvidia.com>
14 one of ADC channel and sensor resistance is read via voltage across the
15 sensor resistor. The voltage read across the sensor is mapped to
16 temperature using voltage-temperature lookup table.
18 $ref: thermal-sensor.yaml#
22 const: generic-adc-thermal
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/linux-6.12.1/drivers/gpu/drm/amd/include/
Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
203 // Common header for all tables (Data table, Command table).
204 // Every table pointed _ATOM_MASTER_DATA_TABLE has this common header.
212 UCHAR ucTableContentRevision; //Change it only when the table needs to change but the firmware
213 … //Image can't be updated, while Driver needs to carry the new table!
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
235 …USHORT usMasterCommandTableOffset;//Offest for SW to get all command table offsets, Don't change t…
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