Searched +full:vddcore +full:- +full:supply (Results 1 – 25 of 45) sorted by relevance
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/ |
D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Jagan Teki <jagan@amarulasolutions.com> 12 - Marek Szyprowski <m.szyprowski@samsung.com> 21 - enum: 22 - samsung,exynos3250-mipi-dsi 23 - samsung,exynos4210-mipi-dsi [all …]
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/linux-6.12.1/Documentation/hwmon/ |
D | lochnagar.rst | 10 ----------- 12 Lochnagar 2 features built-in Current Monitor circuitry that allows for the 13 measurement of both voltage and current on up to eight of the supply voltage 22 ---------------- 47 in3_input Measured voltage for VDDCORE DSP (milliVolts) 48 in3_label "VDDCORE DSP" 49 curr4_input Measured current for VDDCORE DSP (milliAmps) 50 curr4_label "VDDCORE DSP" 51 power4_average Measured average power for VDDCORE DSP (microWatts) 53 power4_label "VDDCORE DSP" [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/media/ |
D | samsung,exynos4210-csis.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/media/samsung,exynos4210-csis.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS) 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 16 - samsung,s5pv210-csis 17 - samsung,exynos4210-csis 18 - samsung,exynos4212-csis [all …]
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D | samsung,fimc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 14 The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices 17 CSIS, FIMC-LITE and FIMC-IS (ISP). 25 '#address-cells': 28 '#size-cells': 31 '#clock-cells': [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/media/i2c/ |
D | thine,thp7312.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul Elder <paul.elder@@ideasonboard.com> 17 MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2 23 - $ref: /schemas/media/video-interface-devices.yaml# 36 thine,boot-mode: 43 0 is for the SPI/2-wire slave boot, 1 is for the SPI master boot (from 46 reset-gpios: 52 vddcore-supply: [all …]
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/linux-6.12.1/arch/arm/boot/dts/st/ |
D | stm32mp157a-microgea-stm32mp1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved 9 compatible = "engicam,microgea-stm32mp1", "st,stm32mp157"; 16 reserved-memory { 17 #address-cells = <1>; 18 #size-cells = <1>; 22 compatible = "shared-dma-pool"; 24 no-map; 28 compatible = "shared-dma-pool"; 30 no-map; [all …]
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D | stm32mp157a-icore-stm32mp1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved 9 compatible = "engicam,icore-stm32mp1", "st,stm32mp157"; 16 reserved-memory { 17 #address-cells = <1>; 18 #size-cells = <1>; 22 compatible = "shared-dma-pool"; 24 no-map; 28 compatible = "shared-dma-pool"; 30 no-map; [all …]
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D | stm32mp15xx-osd32.dtsi | 1 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */ 3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 7 #include "stm32mp15-pinctrl.dtsi" 9 #include <dt-bindings/mfd/st,stpmic1.h> 12 reserved-memory { 13 #address-cells = <1>; 14 #size-cells = <1>; 18 compatible = "shared-dma-pool"; 20 no-map; 24 compatible = "shared-dma-pool"; [all …]
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D | stm32mp15xx-dhcor-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 8 #include "stm32mp15-pinctrl.dtsi" 9 #include "stm32mp15xxac-pinctrl.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/mfd/st,stpmic1.h> 23 reserved-memory { 24 #address-cells = <1>; 25 #size-cells = <1>; 29 compatible = "shared-dma-pool"; [all …]
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D | stm32mp157c-odyssey-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 /dts-v1/; 10 #include "stm32mp15-pinctrl.dtsi" 11 #include "stm32mp15xxac-pinctrl.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> 17 model = "Seeed Studio Odyssey-STM32MP157C SOM"; 18 compatible = "seeed,stm32mp157c-odyssey-som", "st,stm32mp157"; 25 reserved-memory { [all …]
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D | stm32mp157a-stinger96.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 9 #include "stm32mp15-pinctrl.dtsi" 10 #include "stm32mp15xxac-pinctrl.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/mfd/st,stpmic1.h> 24 stdout-path = "serial1:115200n8"; 33 compatible = "gpio-leds"; 38 linux,default-trigger = "heartbeat"; 39 default-state = "off"; [all …]
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D | stm32mp13xx-dhcor-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/mfd/st,stpmic1.h> 10 #include <dt-bindings/regulator/st,stm32mp13-regulator.h> 11 #include "stm32mp13-pinctrl.dtsi" 15 compatible = "dh,stm32mp131a-dhcor-som", 32 reserved-memory { 33 #address-cells = <1>; [all …]
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D | stm32mp157c-ed1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 /dts-v1/; 10 #include "stm32mp15-pinctrl.dtsi" 11 #include "stm32mp15xxaa-pinctrl.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> 18 compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; 25 stdout-path = "serial0:115200n8"; [all …]
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D | stm32mp157c-emstamp-argon.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include "stm32mp15-pinctrl.dtsi" 10 #include "stm32mp15xxac-pinctrl.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/mfd/st,stpmic1.h> 23 stdout-path = "serial0:115200n8"; 31 reserved-memory { 32 #address-cells = <1>; 33 #size-cells = <1>; 37 compatible = "shared-dma-pool"; [all …]
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D | stm32mp157c-phycore-stm32mp15-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de> 4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/leds/leds-pca9532.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> [all …]
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D | stm32mp15xx-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 6 #include "stm32mp15-pinctrl.dtsi" 7 #include "stm32mp15xxaa-pinctrl.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/mfd/st,stpmic1.h> 24 reserved-memory { 25 #address-cells = <1>; 26 #size-cells = <1>; 30 compatible = "shared-dma-pool"; [all …]
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D | stm32mp15xx-dkx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/mfd/st,stpmic1.h> 22 reserved-memory { 23 #address-cells = <1>; 24 #size-cells = <1>; 28 compatible = "shared-dma-pool"; 30 no-map; 34 compatible = "shared-dma-pool"; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mfd/ |
D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 15 Logic devices on mini-cards, as well as allowing connection of 25 [2] include/dt-bindings/pinctrl/lochnagar.h 26 [3] include/dt-bindings/clock/lochnagar.h 28 And these documents for the required sub-node binding details: 35 - if: 39 - cirrus,lochnagar2 [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/ |
D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 STM32 ADC is a successive approximation analog-to-digital converter. 13 stored in a left-aligned or right-aligned 32-bit data register. 17 voltage goes beyond the user-defined, higher or lower thresholds. 22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 27 - st,stm32f4-adc-core 28 - st,stm32h7-adc-core [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/power/reset/ |
D | atmel,sama5d2-shdwc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Claudiu Beznea <claudiu.beznea@microchip.com> 14 and VDDCORE and the wake-up detection on debounced input lines. 19 - items: 20 - const: microchip,sama7g5-shdwc 21 - const: syscon 22 - enum: [all …]
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/linux-6.12.1/drivers/sbus/char/ |
D | envctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * VT - The implementation is to support Sun Microelectronics (SME) platform 8 * controller to access pcf8591 (8-bit A/D and D/A converter) and 9 * pcf8571 (256 x 8-bit static low-voltage RAM with I2C-bus interface). 11 * http://www-eu2.semiconductors.com/pip/PCF8584P 12 * http://www-eu2.semiconductors.com/pip/PCF8574AP 13 * http://www-eu2.semiconductors.com/pip/PCF8591P 15 * EB - Added support for CP1500 Global Address and PS/Voltage monitoring. 18 * DB - Audit every copy_to_user in envctrl_read. 190 while (--limit > 0) { in envtrl_i2c_test_pin() [all …]
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/linux-6.12.1/arch/arm64/boot/dts/st/ |
D | stm32mp257f-ev1.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/regulator/st,stm32mp25-regulator.h> 13 #include "stm32mp25-pinctrl.dtsi" 14 #include "stm32mp25xxai-pinctrl.dtsi" 17 model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board"; 18 compatible = "st,stm32mp257f-ev1", "st,stm32mp257"; 27 stdout-path = "serial0:115200n8"; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8mn-tqma8mqnl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 9 model = "TQ-Systems i.MX8MN TQMa8MxNL"; 10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn"; 18 /* e-MMC IO, needed for HS modes */ 19 reg_vcc1v8: regulator-vcc1v8 { 20 compatible = "regulator-fixed"; 21 regulator-name = "TQMA8MXNL_VCC1V8"; 22 regulator-min-microvolt = <1800000>; 23 regulator-max-microvolt = <1800000>; [all …]
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D | imx8mm-tqma8mqml.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML"; 11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 19 /* e-MMC IO, needed for HS modes */ 20 reg_vcc1v8: regulator-vcc1v8 { 21 compatible = "regulator-fixed"; 22 regulator-name = "TQMA8MXML_VCC1V8"; 23 regulator-min-microvolt = <1800000>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
D | imx6-logicpd-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/input/input.h> 10 stdout-path = &uart1; 18 reg_wl18xx_vmmc: regulator-wl18xx { 19 compatible = "regulator-fixed"; 20 regulator-name = "vwl1837"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 24 startup-delay-us = <70000>; [all …]
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