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/linux-6.12.1/drivers/usb/dwc3/
Ddwc3-exynos.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-exynos.c - Samsung Exynos DWC3 Specific Glue layer
37 struct regulator *vdd10; member
43 struct device *dev = &pdev->dev; in dwc3_exynos_probe()
44 struct device_node *node = dev->of_node; in dwc3_exynos_probe()
50 return -ENOMEM; in dwc3_exynos_probe()
53 exynos->dev = dev; in dwc3_exynos_probe()
54 exynos->num_clks = driver_data->num_clks; in dwc3_exynos_probe()
55 exynos->clk_names = (const char **)driver_data->clk_names; in dwc3_exynos_probe()
56 exynos->suspend_clk_idx = driver_data->suspend_clk_idx; in dwc3_exynos_probe()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dsamsung,exynos-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/samsung,exynos-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - google,gs101-dwusb3
16 - samsung,exynos5250-dwusb3
17 - samsung,exynos5433-dwusb3
18 - samsung,exynos7-dwusb3
19 - samsung,exynos850-dwusb3
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/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dsamsung,exynos-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Szyprowski <m.szyprowski@samsung.com>
11 - Jaehoon Chung <jh80.chung@samsung.com>
16 snps,dw-pcie.yaml.
19 - $ref: /schemas/pci/snps,dw-pcie.yaml#
23 const: samsung,exynos5433-pcie
27 - description: Data Bus Interface (DBI) registers.
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
37 description: Regulator that provides the supply 1.0V power.
39 vdd18-supply:
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/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5410-smdk5410.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 pmic_ap_clk: pmic-ap-clk {
39 compatible = "fixed-clock";
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Dexynos5420-smdk5420.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
31 stdout-path = "serial2:115200n8";
34 fixed-rate-clocks {
36 compatible = "samsung,exynos5420-oscclk";
37 clock-frequency = <24000000>;
41 vdd: regulator-0 {
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Dexynos5422-samsung-k3g.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Galaxy S5 (SM-G900H) device-tree source
8 /dts-v1/;
9 #include <dt-bindings/clock/samsung,s2mps11.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "exynos5422-cpus.dtsi"
16 model = "Samsung Galaxy S5 (SM-G900H)";
20 chassis-type = "handset";
31 fixed-rate-clocks {
[all …]
Dexynos5410-odroidxu.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos54xx-odroidxu-leds.dtsi"
20 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
34 stdout-path = "serial2:115200n8";
38 pinctrl-0 = <&emmc_nrst_pin>;
[all …]
Dexynos5420-galaxy-tab-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
10 /dts-v1/;
12 #include "exynos5420-cpus.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
18 chassis-type = "tablet";
24 * The same hack is also needed to boot exynos4412-i9300 with
27 * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
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Dexynos5420-arndale-octa.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
19 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
32 stdout-path = "serial3:115200n8";
36 compatible = "samsung,secure-firmware";
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Dexynos5422-odroid-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
27 stdout-path = "serial2:115200n8";
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
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Dexynos5250-smdk5250.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/maxim,max77686.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
31 stdout-path = "serial2:115200n8";
34 vdd: fixed-regulator-vdd {
35 compatible = "regulator-fixed";
36 regulator-name = "vdd-supply";
37 regulator-min-microvolt = <1800000>;
[all …]
Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
Dexynos5250-arndale.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
32 stdout-path = "serial2:115200n8";
35 gpio-keys {
36 compatible = "gpio-keys";
[all …]
Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/exynos/google/
Dgs101-oriole.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "gs101-pinctrl.h"
18 compatible = "google,gs101-oriole", "google,gs101";
27 stdout-path = &serial_0;
30 gpio-keys {
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8186-corsola-steelix.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 pp1000_edpbrdg: regulator-pp1000-edpbrdg {
13 compatible = "regulator-fixed";
14 regulator-name = "pp1000_edpbrdg";
15 pinctrl-names = "default";
16 pinctrl-0 = <&en_pp1000_edpbrdg>;
[all …]
Dmt8183-kukui-jacuzzi.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "mt8183-kukui.dtsi"
7 /* Must come after mt8183-kukui.dtsi to modify cros_ec */
8 #include <arm/cros-ec-keyboard.dtsi>
11 pp1200_mipibrdg: pp1200-mipibrdg {
12 compatible = "regulator-fixed";
13 regulator-name = "pp1200_mipibrdg";
14 pinctrl-names = "default";
15 pinctrl-0 = <&pp1200_mipibrdg_en>;
17 enable-active-high;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynos850-e850-96.dts1 // SPDX-License-Identifier: GPL-2.0
3 * WinLink E850-96 board device tree source
8 * Device tree source file for WinLink's E850-96 board which is based on
12 /dts-v1/;
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
20 model = "WinLink E850-96 board";
21 compatible = "winlink,e850-96", "samsung,exynos850";
29 stdout-path = &serial_0;
[all …]
Dexynos7-espresso.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "samsung,exynos7-espresso", "samsung,exynos7";
26 stdout-path = &serial_2;
34 usb30_vbus_reg: regulator-usb30 {
35 compatible = "regulator-fixed";
36 regulator-name = "VBUS_5V";
[all …]
Dexynos5433-tm2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 /dts-v1/;
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h>
48 stdout-path = &serial_1;
56 gpio-keys {
57 compatible = "gpio-keys";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3368-lba3368.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/clock/rockchip,rk808.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/sound/rt5640.h>
25 stdout-path = "serial1:115200n8";
33 adc-key {
34 compatible = "adc-keys";
35 io-channels = <&saradc 1>;
[all …]
/linux-6.12.1/drivers/pci/controller/dwc/
Dpci-exynos.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2020 Samsung Electronics Co., Ltd.
24 #include "pcie-designware.h"
26 #define to_exynos_pcie(x) dev_get_drvdata((x)->dev)
76 val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC); in exynos_pcie_sideband_dbi_w_mode()
81 exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC); in exynos_pcie_sideband_dbi_w_mode()
88 val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC); in exynos_pcie_sideband_dbi_r_mode()
93 exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC); in exynos_pcie_sideband_dbi_r_mode()
100 val = exynos_pcie_readl(ep->elbi_base, PCIE_CORE_RESET); in exynos_pcie_assert_core_reset()
102 exynos_pcie_writel(ep->elbi_base, val, PCIE_CORE_RESET); in exynos_pcie_assert_core_reset()
[all …]

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