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/linux-6.12.1/drivers/clk/imx/
Dclk-imx31.c45 sim_gate, ect_gate, usb_gate, kpp_gate, ipu_gate, uart3_gate, enumerator
103 clk[uart3_gate] = imx_clk_gate2("uart3_gate", "per", base + MXC_CCM_CGR1, 24); in _mx31_clocks_init()
Dclk-imx35.c77 /* 70 */ uart1_gate, uart2_gate, uart3_gate, usbotg_gate, wdog_gate, enumerator
208 clk[uart3_gate] = imx_clk_gate2("uart3_gate", "uart_div", base + MX35_CCM_CGR2, 20); in _mx35_clocks_init()
Dclk-imx1.c58 clk[IMX1_CLK_UART3_GATE] = imx_clk_gate("uart3_gate", "hclk", SCM_GCCR, 6); in mx1_clocks_init_dt()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dimx35-clock.yaml91 uart3_gate 72
Dimx31-clock.yaml67 uart3_gate 48
/linux-6.12.1/include/dt-bindings/clock/
Dnuvoton,ma35d1-clk.h154 #define UART3_GATE 139 macro
/linux-6.12.1/arch/arm64/boot/dts/nuvoton/
Dma35d1.dtsi275 clocks = <&clk UART3_GATE>;
/linux-6.12.1/drivers/clk/nuvoton/
Dclk-ma35d1.c801 hws[UART3_GATE] = ma35d1_clk_gate(dev, "uart3_gate", "uart3_div", in ma35d1_clocks_probe()
/linux-6.12.1/drivers/clk/nxp/
Dclk-lpc32xx.c1293 LPC32XX_DEFINE_GATE(UART3_GATE, UART_CLK_CTRL, 0, 0),
1294 LPC32XX_DEFINE_COMPOSITE(UART3, UART3_MUX, UART3_DIV, UART3_GATE),