Searched +full:tuning +full:- +full:start +full:- +full:tap (Results 1 – 25 of 28) sorted by relevance
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/linux-6.12.1/drivers/mmc/host/ |
D | renesas_sdhi_core.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-19 Renesas Electronics Corporation 6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman 13 * Copyright 2004-2005 Phil Blundell 14 * Copyright 2007-2008 OpenedHand Ltd. 27 #include <linux/mmc/slot-gpio.h> 30 #include <linux/pinctrl/pinctrl-state.h> 95 struct mmc_host *mmc = host->mmc; in renesas_sdhi_clk_enable() 99 ret = clk_prepare_enable(priv->clk_cd); in renesas_sdhi_clk_enable() [all …]
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D | sdhci_am654.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs 5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com 18 #include "sdhci-cqhci.h" 19 #include "sdhci-pltfm.h" 88 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1 108 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy", 109 "ti,itap-del-sel-legacy", 111 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs", 112 "ti,itap-del-sel-mmc-hs", [all …]
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D | sdhci-esdhc-imx.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * derived from the OF-version. 23 #include <linux/mmc/slot-gpio.h> 28 #include "sdhci-cqhci.h" 29 #include "sdhci-pltfm.h" 30 #include "sdhci-esdhc.h" 70 /* Tuning bits */ 82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1) 106 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ 140 * open ended multi-blk IO. Otherwise the TC INT wouldn't [all …]
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D | sdhci-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/dma-mapping.h> 20 #include <linux/mmc/slot-gpio.h> 32 #include "sdhci-cqhci.h" 33 #include "sdhci-pltfm.h" 192 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw() 194 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw() 200 return readw(host->ioaddr + reg); in tegra_sdhci_readw() 213 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew() 216 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew() [all …]
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D | sdhci-of-dwcmshc.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <linux/arm-smccc.h> 14 #include <linux/dma-mapping.h> 24 #include "sdhci-pltfm.h" 41 /* Tuning and auto-tuning fields in AT_CTRL_R control register */ 46 #define AT_CTRL_SW_TUNE_EN BIT(4) /* enable software managed tuning */ 51 #define AT_CTRL_PRE_CHANGE_DLY 0x1 /* 2-cycle latency */ 53 #define AT_CTRL_POST_CHANGE_DLY 0x3 /* 4-cycle latency */ 151 #define PHY_PAD_TXSLEW_CTRL_P 0x3 /* Slew control for P-Type pad TX */ 153 #define PHY_PAD_TXSLEW_CTRL_N 0x3 /* Slew control for N-Type pad TX */ [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mmc/ |
D | fsl-imx-esdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 13 - $ref: sdhci-common.yaml# 20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 25 - enum: 26 - fsl,imx25-esdhc 27 - fsl,imx35-esdhc [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8ulp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx93.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx93-clock.h> 7 #include <dt-bindings/dma/fsl-edma.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/fsl,imx93-power.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx93-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx8-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 conn_axi_clk: clock-conn-axi { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <333333333>; 14 clock-output-names = "conn_axi_clk"; 17 conn_ahb_clk: clock-conn-ahb { [all …]
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D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx95.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 6 #include <dt-bindings/dma/fsl-edma.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx95-clock.h" 13 #include "imx95-pinfunc.h" 14 #include "imx95-power.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx7ulp-pinfunc.h" 15 interrupt-parent = <&intc>; 17 #address-cells = <1>; 18 #size-cells = <1>; 37 #address-cells = <1>; [all …]
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D | imxrt1050.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "../../armv7-m.dtsi" 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/imxrt1050-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 18 compatible = "fixed-clock"; 19 #clock-cells = <0>; 20 clock-frequency = <24000000>; [all …]
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D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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/linux-6.12.1/drivers/phy/rockchip/ |
D | phy-rockchip-emmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com> 20 * The higher 16-bit of this register is used for write protection 106 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power() 107 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power() 111 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power() 112 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power() 121 rate = clk_get_rate(rk_phy->emmcclk); in rockchip_emmc_phy_power() 146 rate - ideal_rate : ideal_rate - rate; in rockchip_emmc_phy_power() 149 * In order for tuning delays to be accurate we need to be in rockchip_emmc_phy_power() [all …]
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/linux-6.12.1/Documentation/virt/uml/ |
D | user_mode_linux_howto_v2.rst | 1 .. SPDX-License-Identifier: GPL-2.0 25 Most OSes today have built-in support for a number of "fake" 27 User Mode Linux takes this concept to the ultimate extreme - there 30 concepts which map onto something provided by the host - files, sockets, 36 The UML kernel is just a process running on Linux - same as any other 57 * You can run a usermode kernel as a non-root user (you may need to 99 This is extremely easy on Debian - you can do it using debootstrap. It is 100 also easy on OpenWRT - the build process can build UML images. All other 101 distros - YMMV. 114 or by running ``tune2fs -o discard /dev/ubdXX`` will request UML to [all …]
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/linux-6.12.1/drivers/input/rmi4/ |
D | rmi_f11.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2011-2015 Synaptics Incorporated 181 * struct f11_2d_sensor_queries - describes sensor capabilities 185 * @nr_fingers: describes the maximum number of fingers the 2-D sensor 193 * @nr_x_electrodes: the maximum number of electrodes the 2-D sensor 195 * @nr_y_electrodes: the maximum number of electrodes the 2-D sensor 205 * @has_anchored_finger: then the sensor supports the high-precision second 224 * @has_single_tap: a basic single-tap gesture is supported. 225 * @has_tap_n_hold: tap-and-hold gesture is supported. 226 * @has_double_tap: double-tap gesture is supported. [all …]
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/linux-6.12.1/drivers/phy/ |
D | phy-xgene.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * AppliedMicro X-Gene Multi-purpose PHY driver 10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes. 19 * ----------------- 20 * | Internal | |------| 21 * | Ref PLL CMU |----| | ------------- --------- 22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes| 23 * | | | | --------- 24 * External Clock ------| | ------------- 25 * |------| [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/ |
D | atomfirmware.h | 6 * Description header file of general definitions for OS and pre-OS video drivers 31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan… 115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/ 116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication 117 ATOM_SCALER_EXPANSION =2, /*scaler expansion by 2 tap alpha blending mode*/ 202 #define BIOS_VERSION_PREFIX "ATOMBIOSBK-AMD" 245 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios, 604 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt 605 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt 636 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt [all …]
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