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/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Ddelta,tn48m-cpld.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Delta Networks TN48M CPLD controller
10 - Robert Marko <robert.marko@sartura.hr>
13 Lattice CPLD onboard the TN48M switches is used for system
19 It is also being used as a GPIO expander and reset controller
20 for the switch MAC-s and other peripherals.
24 const: delta,tn48m-cpld
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/linux-6.12.1/Documentation/devicetree/bindings/reset/
Ddelta,tn48m-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/delta,tn48m-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Delta Networks TN48M CPLD reset controller
10 - Robert Marko <robert.marko@sartura.hr>
13 This module is part of the Delta TN48M multi-function device. For more
14 details see ../mfd/delta,tn48m-cpld.yaml.
16 Reset controller modules provides resets for the following:
19 * 98DX3265 switch MAC-s
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/linux-6.12.1/drivers/reset/
Dreset-tn48m.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Delta TN48M CPLD reset driver
16 #include <linux/reset-controller.h>
18 #include <dt-bindings/reset/delta,tn48m-reset.h>
55 regmap_update_bits(data->regmap, TN48M_RESET_REG, in tn48m_control_reset()
58 return regmap_read_poll_timeout(data->regmap, in tn48m_control_reset()
73 ret = regmap_read(data->regmap, TN48M_RESET_REG, &regval); in tn48m_control_status()
84 .reset = tn48m_control_reset,
93 regmap = dev_get_regmap(pdev->dev.parent, NULL); in tn48m_reset_probe()
95 return -ENODEV; in tn48m_reset_probe()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 bool "Reset Controller Support"
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
22 This option enables support for the external reset functions for
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += core.o
3 obj-y += hisilicon/
4 obj-y += starfive/
5 obj-y += sti/
6 obj-y += tegra/
7 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
8 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
9 obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
10 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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