| /linux-6.12.1/Documentation/devicetree/bindings/usb/ |
| D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB2 ChipIdea USB controller
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
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| D | nvidia,tegra20-ehci.txt | 1 Tegra SOC USB controllers
3 The device node for a USB controller that is part of a Tegra
9 - compatible : For Tegra20, must contain "nvidia,tegra20-ehci".
10 For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain
11 "nvidia,<chip>-ehci" plus at least one of the above, where <chip> is
13 - nvidia,phy : phandle of the PHY that the controller is connected to.
14 - clocks : Must contain one entry, for the module clock.
15 See ../clocks/clock-bindings.txt for details.
16 - resets : Must contain an entry for each entry in reset-names.
18 - reset-names : Must include the following entries:
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| /linux-6.12.1/arch/arm/boot/dts/nvidia/ |
| D | tegra30.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
13 compatible = "nvidia,tegra30";
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| D | tegra114.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
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| D | tegra124.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
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| D | tegra30-apalis-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis.dtsi"
9 compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30",
10 "nvidia,tegra30";
23 stdout-path = "serial0:115200n8";
46 hdmi-supply = <®_5v0>;
52 pex-perst-n-hog {
53 gpio-hog;
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| D | tegra30-colibri-eval-v3.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-colibri.dtsi"
9 compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30",
10 "nvidia,tegra30";
22 stdout-path = "serial0:115200n8";
35 hdmi-supply = <®_5v0>;
39 /* Colibri UART-A */
41 /delete-property/ dmas;
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| D | tegra30-apalis-v1.1-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis-v1.1.dtsi"
9 compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval",
10 "toradex,apalis_t30-v1.1", "toradex,apalis_t30",
11 "nvidia,tegra30";
24 stdout-path = "serial0:115200n8";
47 hdmi-supply = <®_5v0>;
53 pex-perst-n-hog {
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| D | tegra30-cardhu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
4 #include "tegra30.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
17 * tegra30-cardhu-a04.dts.
20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
22 * The (downstream internal) U-Boot of Cardhu display the board-id as
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| D | tegra30-asus-tf201.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-asus-transformer-common.dtsi"
5 #include "tegra30-asus-lvds-display.dtsi"
9 compatible = "asus,tf201", "nvidia,tegra30";
19 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
27 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
35 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
43 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
51 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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| D | tegra30-asus-nexus7-grouper-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/power/summit,smb347-charger.h>
6 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra30.dtsi"
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11 #include "tegra30-asus-lvds-display.dtsi"
27 * pre-existing /chosen node to be available to insert the
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| D | tegra30-asus-transformer-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra30.dtsi"
8 #include "tegra30-cpu-opp.dtsi"
9 #include "tegra30-cpu-opp-microvolt.dtsi"
12 chassis-type = "convertible";
31 * pre-existing /chosen node to be available to insert the
37 trusted-foundations {
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| D | tegra30-beaver.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
9 model = "NVIDIA Tegra30 Beaver evaluation board";
10 compatible = "nvidia,beaver", "nvidia,tegra30";
19 stdout-path = "serial0:115200n8";
29 avdd-pexa-supply = <&ldo1_reg>;
30 vdd-pexa-supply = <&ldo1_reg>;
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| D | tegra124-jetson-tk1.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
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| D | tegra30-lg-x3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30.dtsi"
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
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| D | tegra30-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra30.dtsi"
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <®_1v8_avdd_hdmi_pll>;
19 vdd-supply = <®_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
27 output-high;
28 line-name = "LAN_RESET#";
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| D | tegra124-apalis-v1.2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <®_1v05_vdd>;
22 avdd-pex-pll-supply = <®_1v05_vdd>;
23 avdd-pll-erefe-supply = <®_1v05_avdd>;
24 dvddio-pex-supply = <®_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <®_module_3v3>;
26 hvdd-pex-supply = <®_module_3v3>;
27 vddio-pex-ctl-supply = <®_module_3v3>;
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| D | tegra124-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <®_1v05_vdd>;
21 avdd-pex-pll-supply = <®_1v05_vdd>;
22 avdd-pll-erefe-supply = <®_1v05_avdd>;
23 dvddio-pex-supply = <®_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <®_module_3v3>;
25 hvdd-pex-supply = <®_module_3v3>;
26 vddio-pex-ctl-supply = <®_module_3v3>;
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| D | tegra30-pegatron-chagall.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra30.dtsi"
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11 #include "tegra30-asus-lvds-display.dtsi"
15 compatible = "pegatron,chagall", "nvidia,tegra30";
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | nvidia,tegra20-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra USB PHY
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
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| /linux-6.12.1/arch/arm64/boot/dts/nvidia/ |
| D | tegra132.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
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| D | tegra210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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| /linux-6.12.1/drivers/usb/chipidea/ |
| D | ci_hdrc_tegra.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/usb.h>
15 #include <linux/usb/chipidea.h>
16 #include <linux/usb/hcd.h>
17 #include <linux/usb/of.h>
18 #include <linux/usb/phy.h>
31 struct usb_phy *phy; member
77 .compatible = "nvidia,tegra20-ehci",
80 .compatible = "nvidia,tegra30-ehci",
83 .compatible = "nvidia,tegra20-udc",
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| /linux-6.12.1/drivers/usb/phy/ |
| D | phy-tegra-usb.c | 1 // SPDX-License-Identifier: GPL-2.0
27 #include <linux/usb/ehci_def.h>
28 #include <linux/usb/of.h>
29 #include <linux/usb/tegra_usb_phy.h>
30 #include <linux/usb/ulpi.h>
39 /* HOSTPC1 PTS/PHCD bits, Tegra30 and above */
159 /* For Tegra30 and above only, the address is different in Tegra20 */
221 static void set_pts(struct tegra_usb_phy *phy, u8 pts_val) in set_pts() argument
223 void __iomem *base = phy->regs; in set_pts()
226 if (phy->soc_config->has_hostpc) { in set_pts()
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| /linux-6.12.1/ |
| D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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