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Searched +full:tegra210 +full:- +full:emc +full:- +full:table (Results 1 – 10 of 10) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra210-emc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 SoC External Memory Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The EMC interfaces with the off-chip SDRAM to service the request stream
19 const: nvidia,tegra210-emc
26 - description: external memory clock
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/linux-6.12.1/Documentation/devicetree/bindings/reserved-memory/
Dnvidia,tegra210-emc-table.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra210-emc-table.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 EMC Frequency Table
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: On Tegra210, firmware passes a binary representation of the
14 EMC frequency table via a reserved memory region.
17 - $ref: reserved-memory.yaml
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/linux-6.12.1/drivers/memory/tegra/
Dtegra210-emc-table.c1 // SPDX-License-Identifier: GPL-2.0
8 #include "tegra210-emc.h"
15 struct tegra210_emc *emc = dev_get_drvdata(dev); in tegra210_emc_table_device_init() local
19 timings = memremap(rmem->base, rmem->size, MEMREMAP_WB); in tegra210_emc_table_device_init()
21 dev_err(dev, "failed to map EMC table\n"); in tegra210_emc_table_device_init()
22 return -ENOMEM; in tegra210_emc_table_device_init()
33 if (emc->derated) { in tegra210_emc_table_device_init()
34 dev_warn(dev, "excess EMC table '%s'\n", rmem->name); in tegra210_emc_table_device_init()
38 if (emc->nominal) { in tegra210_emc_table_device_init()
39 if (count != emc->num_timings) { in tegra210_emc_table_device_init()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 tegra-mc-y := mc.o
4 tegra-mc-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o
5 tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
6 tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
7 tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
8 tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
9 tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
10 tegra-mc-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o
11 tegra-mc-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra186.o tegra194.o
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Dtegra210-emc-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
21 #include "tegra210-emc.h"
22 #include "tegra210-mc.h"
62 next->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## \
69 next->trim_perch_regs[EMC ## chan ## \
561 struct tegra210_emc *emc = from_timer(emc, timer, training); in tegra210_emc_train() local
564 if (!emc->last) in tegra210_emc_train()
567 spin_lock_irqsave(&emc->lock, flags); in tegra210_emc_train()
569 if (emc->sequence->periodic_compensation) in tegra210_emc_train()
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Dtegra210-emc-cc-r21021.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
14 #include "tegra210-emc.h"
15 #include "tegra210-mc.h"
36 #define emc_dbg(emc, flags, ...) dev_dbg(emc->dev, __VA_ARGS__) argument
53 * PTFV defines - basically just indexes into the per table PTFV array.
78 ({ next->ptfv_list[(dev)] = \
79 next->ptfv_list[(dev)] / \
80 next->ptfv_list[PTFV_DVFS_SAMPLES_INDEX]; })
86 ({ next->ptfv_list[(dev)] += \
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Dtegra210-emc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
891 /* nominal EMC frequency table */
893 /* derated EMC frequency table */
896 /* currently selected table (nominal or derated) */
939 void (*set_clock)(struct tegra210_emc *emc, u32 clksrc);
940 u32 (*periodic_compensation)(struct tegra210_emc *emc);
943 static inline void emc_writel(struct tegra210_emc *emc, u32 value, in emc_writel() argument
946 writel_relaxed(value, emc->regs + offset); in emc_writel()
949 static inline u32 emc_readl(struct tegra210_emc *emc, unsigned int offset) in emc_readl() argument
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/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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/linux-6.12.1/drivers/usb/host/
Dxhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
11 #include <linux/dma-mapping.h>
321 return readl(tegra->fpci_base + offset); in fpci_readl()
327 writel(value, tegra->fpci_base + offset); in fpci_writel()
332 return readl(tegra->ipfs_base + offset); in ipfs_readl()
338 writel(value, tegra->ipfs_base + offset); in ipfs_writel()
343 return readl(tegra->bar2_base + offset); in bar2_readl()
349 writel(value, tegra->bar2_base + offset); in bar2_writel()
354 const struct tegra_xusb_soc_ops *ops = tegra->soc->ops; in csb_readl()
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