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Searched +full:t8103 +full:- +full:pcie (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dapple,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/apple,pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple PCIe host controller
10 - Mark Kettenis <kettenis@openbsd.org>
13 The Apple PCIe host controller is a PCIe host controller with
16 The controller incorporates Synopsys DesigWare PCIe logic to
18 PCIe host bridges is absent.
22 the standard "reset-gpios" and "max-link-speed" properties appear on
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/linux-6.12.1/Documentation/devicetree/bindings/nvme/
Dapple,nvme-ans.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
15 - enum:
16 - apple,t8103-nvme-ans2
17 - apple,t8112-nvme-ans2
18 - apple,t6000-nvme-ans2
19 - const: apple,nvme-ans2
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/linux-6.12.1/arch/arm64/boot/dts/apple/
Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Apple T8103 "M1" SoC
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
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Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
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/linux-6.12.1/Documentation/devicetree/bindings/nvmem/
Dapple,efuses.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC eFuse-based NVMEM
10 Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store
11 calibration data for the PCIe and the Type-C PHY or unique chip identifiers
15 - Sven Peter <sven@svenpeter.dev>
18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml#
24 - enum:
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dapple,pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Kettenis <kettenis@openbsd.org>
20 - enum:
21 - apple,t8103-pinctrl
22 - apple,t8112-pinctrl
23 - apple,t6000-pinctrl
24 - const: apple,pinctrl
32 gpio-controller: true
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/linux-6.12.1/drivers/clk/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
67 found on Apple SoCs such as t8103 (M1). The blocks are typically
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
98 multi-function device has one fixed-rate oscillator, clocked
129 be pre-programmed to support other configurations and features not yet
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
285 clock. These multi-function devices have two (S2MPS14) or three
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/linux-6.12.1/drivers/iommu/
Dapple-dart.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on arm/arm-smmu/arm-ssmu.c and arm/arm-smmu-v3/arm-smmu-v3.c
10 * and on exynos-iommu.c
18 #include <linux/dma-mapping.h>
21 #include <linux/io-pgtable.h>
35 #include "dma-iommu.h"
145 #define DART_TCR(dart, sid) ((dart)->hw->tcr + ((sid) << 2))
147 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \
148 (((dart)->hw->ttbr_count * (sid)) << 2) + \
192 * @hw: SoC-specific hardware data
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