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/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
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/linux-6.12.1/drivers/usb/dwc3/
Ddwc3-am62.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-am62.c - TI specific Glue layer for AM62 DWC3 USB Controller
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com
12 #include <linux/mfd/syscon.h>
57 /* WAKEUP CONFIG register bits */
70 /* WAKEUP STAT register bits */
116 struct regmap *syscon; member
140 return readl((am62->usbss) + offset); in dwc3_ti_readl()
145 writel(value, (am62->usbss) + offset); in dwc3_ti_writel()
150 struct device *dev = am62->dev; in phy_syscon_pll_refclk()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am62a-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM62A SoC Family Wakeup Domain peripherals
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
16 compatible = "ti,am654-chipid";
20 cpsw_mac_syscon: ethernet-mac-syscon@200 {
21 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
25 usb0_phy_ctrl: syscon@4008 {
[all …]
Dk3-am62-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
11 wkup_conf: syscon@43000000 {
12 bootph-all;
13 compatible = "syscon", "simple-mfd";
15 #address-cells = <1>;
16 #size-cells = <1>;
20 bootph-all;
[all …]
Dk3-am62p-j722s-common-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree file for the WAKEUP domain peripherals shared by AM62P and J722S
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
15 bootph-all;
18 compatible = "ti,am654-chipid";
20 bootph-all;
23 cpsw_mac_syscon: ethernet-mac-syscon@200 {
[all …]
/linux-6.12.1/drivers/usb/fotg210/
Dfotg210-core.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/mfd/syscon.h>
23 #define FOTG210_RR_ID BIT(21) /* 1 = B-device, 0 = A-device */
27 * Gemini-specific initialization function, only executed on the
30 * The gemini USB blocks are connected to either Mini-A (host mode) or
31 * Mini-B (peripheral mode) plugs. There is no role switch support on the
32 * Gemini SoC, just either-or.
45 struct device *dev = fotg->dev; in fotg210_gemini_init()
46 struct device_node *np = dev->of_node; in fotg210_gemini_init()
48 bool wakeup; in fotg210_gemini_init() local
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/linux-6.12.1/Documentation/devicetree/bindings/crypto/
Dfsl,sec-v4.0-mon.yaml1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Freescale Secure Non-Volatile Storage (SNVS)
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
23 - items:
[all …]
/linux-6.12.1/arch/arm/boot/dts/cirrus/
Dep93xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/cirrus,ep9301-syscon.h>
11 compatible = "simple-bus";
13 #address-cells = <1>;
14 #size-cells = <1>;
16 syscon: syscon@80930000 { label
17 compatible = "cirrus,ep9301-syscon", "syscon";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/soc/qcom/
Dqcom,rpm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <andersson@kernel.org>
21 - qcom,rpm-apq8064
22 - qcom,rpm-msm8660
23 - qcom,rpm-msm8960
24 - qcom,rpm-ipq8064
25 - qcom,rpm-mdm9615
33 interrupt-names:
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/linux-6.12.1/arch/arm/boot/dts/intel/ixp/
Dintel-ixp42x-freecom-fsg-3.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for the Freecom FSG-3 router.
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
14 model = "Freecom FSG-3";
15 compatible = "freecom,fsg-3", "intel,ixp42x";
16 #address-cells = <1>;
17 #size-cells = <1>;
28 stdout-path = "uart0:115200n8";
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/linux-6.12.1/Documentation/devicetree/bindings/power/reset/
Datmel,sama5d2-shdwc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - items:
20 - const: microchip,sama7g5-shdwc
21 - const: syscon
22 - enum:
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/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynosautov920.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov920.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,exynos-usi.h>
15 #address-cells = <2>;
16 #size-cells = <1>;
18 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a78-pmu";
37 compatible = "fixed-clock";
[all …]
Dexynos850.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/exynos850.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/samsung,exynos-usi.h>
20 #address-cells = <2>;
21 #size-cells = <1>;
23 interrupt-parent = <&gic>;
34 arm-pmu {
35 compatible = "arm,cortex-a55-pmu";
44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dti,omap-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kishon Vijay Abraham I <kishon@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
16 - items:
17 - enum:
18 - ti,dra7x-usb2
19 - ti,dra7x-usb2-phy2
[all …]
Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
[all …]
/linux-6.12.1/arch/arm/mach-s5pv210/
Dpm.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
6 // S5PV210 - Power Management support
8 // Based on arch/arm/mach-s3c2410/pm.c
16 #include <linux/soc/samsung/s3c-pm.h>
22 #include "regs-clock.h"
34 * s3c_pm_do_save() - save a set of registers for restoration on resume.
39 * array for later restoration when we wakeup.
43 for (; count > 0; count--, ptr++) { in s3c_pm_do_save()
44 ptr->val = readl_relaxed(ptr->reg); in s3c_pm_do_save()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7981b.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include <dt-bindings/clock/mediatek,mt7981-clk.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/reset/mt7986-resets.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a53";
[all …]
/linux-6.12.1/drivers/input/keyboard/
Dsnvs_pwrkey.c1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/mfd/syscon.h>
39 int wakeup; member
48 struct input_dev *input = pdata->input; in imx_imx_snvs_check_for_events()
51 regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); in imx_imx_snvs_check_for_events()
55 if (state ^ pdata->keystate) { in imx_imx_snvs_check_for_events()
56 pdata->keystate = state; in imx_imx_snvs_check_for_events()
57 input_event(input, EV_KEY, pdata->keycode, state); in imx_imx_snvs_check_for_events()
59 pm_relax(pdata->input->dev.parent); in imx_imx_snvs_check_for_events()
64 mod_timer(&pdata->check_timer, in imx_imx_snvs_check_for_events()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/exynos/google/
Dgs101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2019-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 #include <dt-bindings/clock/google,gs101.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/soc/samsung,exynos-usi.h>
16 #address-cells = <2>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/gemini/
Dgemini-nas4220b.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
12 model = "Raidsonic NAS IB-4220-B";
13 compatible = "raidsonic,ib-4220-b", "cortina,gemini";
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
[all …]
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5410.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a15";
37 clock-frequency = <1600000000>;
42 compatible = "arm,cortex-a15";
[all …]
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91sam9260ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 stdout-path = &dbgu;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
38 compatible = "atmel,tcb-timer";
43 compatible = "atmel,tcb-timer";
49 atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
54 pinctrl-0 = <
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dst,stm32-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Fabien Dessenne <fabien.dessenne@foss.st.com>
15 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
19 const: st,stm32mp1-m4
31 reset-names:
33 - const: mcu_rst
34 - const: hold_boot
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gateable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gateable
34 - Core clocks
35 - 0 0 APLL
[all …]

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