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Searched full:sys_ctrl (Results 1 – 21 of 21) sorted by relevance

/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhi6220.dtsi270 sys_ctrl: sys_ctrl@f7030000 { label
322 clocks = <&sys_ctrl HI6220_UART1_PCLK>,
323 <&sys_ctrl HI6220_UART1_PCLK>;
336 clocks = <&sys_ctrl HI6220_UART2_PCLK>,
337 <&sys_ctrl HI6220_UART2_PCLK>;
348 clocks = <&sys_ctrl HI6220_UART3_PCLK>,
349 <&sys_ctrl HI6220_UART3_PCLK>;
360 clocks = <&sys_ctrl HI6220_UART4_PCLK>,
361 <&sys_ctrl HI6220_UART4_PCLK>;
375 clocks = <&sys_ctrl HI6220_EDMAC_ACLK>;
[all …]
Dhi6220-hikey.dts268 assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dhisilicon,hi6210-i2s.txt31 clocks = <&sys_ctrl HI6220_DACODEC_PCLK>,
32 <&sys_ctrl HI6220_BBPPLL0_DIV>;
36 hisilicon,sysctrl-syscon = <&sys_ctrl>;
/linux-6.12.1/drivers/gpu/drm/imx/dcss/
Ddcss-dpr.c104 u32 sys_ctrl; member
328 u32 sys_ctrl; in dcss_dpr_enable() local
330 sys_ctrl = (en ? REPEAT_EN | RUN_EN : 0); in dcss_dpr_enable()
338 if (ch->sys_ctrl != sys_ctrl) in dcss_dpr_enable()
341 ch->sys_ctrl = sys_ctrl; in dcss_dpr_enable()
524 ch->sys_ctrl, in dcss_dpr_write_sysctrl()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dhi6220-clock.txt35 sys_ctrl: sys_ctrl@f7030000 {
/linux-6.12.1/drivers/input/touchscreen/
Diqs7211.c344 u8 sys_ctrl; member
384 .sys_ctrl = 0x35,
422 .sys_ctrl = 0x50,
459 .sys_ctrl = 0x33,
1477 error = iqs7211_read_word(iqs7211, dev_desc->sys_ctrl + 1, in iqs7211_start_comms()
1487 error = iqs7211_write_word(iqs7211, dev_desc->sys_ctrl + 1, in iqs7211_start_comms()
1509 error = iqs7211_write_word(iqs7211, dev_desc->sys_ctrl + 1, in iqs7211_start_comms()
1524 __le16 sys_ctrl[] = { in iqs7211_init_device() local
1535 error = iqs7211_write_burst(iqs7211, dev_desc->sys_ctrl, sys_ctrl, in iqs7211_init_device()
1536 sizeof(sys_ctrl)); in iqs7211_init_device()
[all …]
/linux-6.12.1/drivers/mfd/
Dstmfx.c118 u32 sys_ctrl; in stmfx_function_enable() local
122 ret = regmap_read(stmfx->map, STMFX_REG_SYS_CTRL, &sys_ctrl); in stmfx_function_enable()
133 (sys_ctrl & STMFX_REG_SYS_CTRL_ALTGPIO_EN)) { in stmfx_function_enable()
140 (sys_ctrl & STMFX_REG_SYS_CTRL_TS_EN)) { in stmfx_function_enable()
147 (sys_ctrl & STMFX_REG_SYS_CTRL_IDD_EN)) { in stmfx_function_enable()
Dstmpe.c899 /* STMPE801 and STMPE610 use bit 1 of SYS_CTRL register */ in stmpe_reset()
902 /* all other STMPE variant use bit 7 of SYS_CTRL register */ in stmpe_reset()
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-hi6220-usb.txt15 hisilicon,peripheral-syscon = <&sys_ctrl>;
/linux-6.12.1/Documentation/devicetree/bindings/thermal/
Dhisilicon,tsensor.yaml54 clocks = <&sys_ctrl HI6220_TSENSOR_CLK>;
/linux-6.12.1/Documentation/devicetree/bindings/arm/
Darm,coresight-cpu-debug.yaml77 clocks = <&sys_ctrl 1>;
/linux-6.12.1/include/linux/mfd/
Dstmfx.h105 * @bkp_sysctrl: backup of SYS_CTRL register for suspend/resume
/linux-6.12.1/drivers/gpu/drm/bridge/
Dchipone-icn6211.c32 #define SYS_CTRL(n) (0x10 + ((n) & 0x7)) /* 0..4 */ macro
429 chipone_writeb(icn, SYS_CTRL(0), 0x40); in chipone_atomic_enable()
437 chipone_writeb(icn, SYS_CTRL(1), sys_ctrl_1); in chipone_atomic_enable()
/linux-6.12.1/drivers/clk/sophgo/
Dclk-sg2042-pll.c22 /* Registers defined in SYS_CTRL */
36 * **NOTE**: PLL registers are all in SYS_CTRL!
Dclk-sg2042-rpgate.c86 * registers are defined in SYS_CTRL.
Dclk-sg2042-clkgen.c21 /* Registers defined in SYS_CTRL */
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinit.c114 /* Enable PBF and MAC clock SYS_CTRL[11:10] = 0x3 */ in mt76x0_init_mac_registers()
/linux-6.12.1/drivers/staging/rtl8712/
Drtl8712_syscfg_bitdef.h26 /*SYS_CTRL*/
/linux-6.12.1/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt104 the new SYS_CTRL interface, or "brcm,bcm7038-reboot" for 65nm
/linux-6.12.1/drivers/clk/meson/
Da1-peripherals.c1822 static MESON_GATE(sys_ctrl, SYS_CLK_EN0, 5);
1886 [CLKID_SYS_CTRL] = &sys_ctrl.hw,
2044 &sys_ctrl,
Dc3-peripherals.c195 static C3_SYS_GATE(sys_ctrl, SYS_CLK_EN0_REG0, 5, 0);
1900 [CLKID_SYS_CTRL] = &sys_ctrl.hw,
2105 &sys_ctrl,