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Searched +full:sun9i +full:- +full:a80 +full:- +full:usb +full:- +full:phy +full:- +full:clk (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/arch/arm/boot/dts/allwinner/ !
Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
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Dsun8i-v3s.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
47 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
51 #address-cells = <1>;
52 #size-cells = <1>;
53 interrupt-parent = <&gic>;
56 #address-cells = <1>;
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ !
Dallwinner,sun9i-a80-usb-phy-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-phy-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A80 USB PHY Clock
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
22 "#reset-cells":
26 const: allwinner,sun9i-a80-usb-phy-clk
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/linux-6.12.1/drivers/clk/sunxi-ng/ !
Dccu-sun9i-a80-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
6 #include <linux/clk.h>
7 #include <linux/clk-provider.h>
15 #include "ccu-sun9i-a80-usb.h"
25 static SUNXI_CCU_GATE_DATA(bus_hci0_clk, "bus-hci0", clk_parent_bus, 0x0, BIT(1), 0);
26 static SUNXI_CCU_GATE_DATA(usb_ohci0_clk, "usb-ohci0", clk_parent_hosc, 0x0, BIT(2), 0);
27 static SUNXI_CCU_GATE_DATA(bus_hci1_clk, "bus-hci1", clk_parent_bus, 0x0, BIT(3), 0);
28 static SUNXI_CCU_GATE_DATA(bus_hci2_clk, "bus-hci2", clk_parent_bus, 0x0, BIT(5), 0);
29 static SUNXI_CCU_GATE_DATA(usb_ohci2_clk, "usb-ohci2", clk_parent_hosc, 0x0, BIT(6), 0);
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/linux-6.12.1/drivers/phy/allwinner/ !
Dphy-sun9i-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Allwinner sun9i USB phy driver
5 * Copyright (C) 2014-2015 Chen-Yu Tsai <wens@csie.org>
7 * Based on phy-sun4i-usb.c from
14 #include <linux/clk.h>
18 #include <linux/phy/phy.h>
19 #include <linux/usb/of.h>
36 struct phy *phy; member
39 struct clk *clk; member
40 struct clk *hsic_clk;
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/linux-6.12.1/drivers/clk/sunxi/ !
Dclk-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013-2015 Emilio López
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
19 * sunxi_usb_reset... - reset bits in usb clk registers handling
25 struct clk *clk; member
38 clk_prepare_enable(data->clk); in sunxi_usb_reset_assert()
39 spin_lock_irqsave(data->lock, flags); in sunxi_usb_reset_assert()
41 reg = readl(data->reg); in sunxi_usb_reset_assert()
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/linux-6.12.1/arch/arm64/boot/dts/allwinner/ !
Dsun50i-h616.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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