Searched +full:sun7i +full:- +full:a20 +full:- +full:gmac +full:- +full:clk (Results 1 – 12 of 12) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | allwinner,sun7i-a20-gmac-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A20 GMAC TX Clock 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#clock-cells": 18 const: allwinner,sun7i-a20-gmac-clk 29 clock-output-names: [all …]
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/linux-6.12.1/arch/arm/boot/dts/allwinner/ |
D | sun7i-a20.dtsi | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 46 #include <dt-bindings/thermal/thermal.h> 47 #include <dt-bindings/dma/sun4i-a10.h> 48 #include <dt-bindings/clock/sun7i-a20-ccu.h> 49 #include <dt-bindings/reset/sun4i-a10-ccu.h> 50 #include <dt-bindings/pinctrl/sun4i-a10.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <1>; [all …]
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D | sun6i-a31.dtsi | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 46 #include <dt-bindings/thermal/thermal.h> 48 #include <dt-bindings/clock/sun6i-a31-ccu.h> 49 #include <dt-bindings/clock/sun6i-rtc.h> 50 #include <dt-bindings/reset/sun6i-a31-ccu.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <1>; 55 #size-cells = <1>; [all …]
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D | sun7i-a20-bananapi.dts | 6 * This file is dual-licensed: you can use it either under the terms 45 /dts-v1/; 46 #include "sun7i-a20.dtsi" 47 #include "sunxi-common-regulators.dtsi" 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/interrupt-controller/irq.h> 54 compatible = "lemaker,bananapi", "allwinner,sun7i-a20"; 63 stdout-path = "serial0:115200n8"; 66 hdmi-connector { 67 compatible = "hdmi-connector"; [all …]
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D | sun9i-a80.dtsi | 2 * Copyright 2014 Chen-Yu Tsai 4 * Chen-Yu Tsai <wens@csie.org> 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/clock/sun9i-a80-ccu.h> 48 #include <dt-bindings/clock/sun9i-a80-de.h> 49 #include <dt-bindings/clock/sun9i-a80-usb.h> 50 #include <dt-bindings/reset/sun9i-a80-ccu.h> 51 #include <dt-bindings/reset/sun9i-a80-de.h> 52 #include <dt-bindings/reset/sun9i-a80-usb.h> [all …]
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D | sun8i-r40.dtsi | 2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org> 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 45 #include <dt-bindings/clock/sun6i-rtc.h> 46 #include <dt-bindings/clock/sun8i-de2.h> 47 #include <dt-bindings/clock/sun8i-r40-ccu.h> 48 #include <dt-bindings/clock/sun8i-tcon-top.h> 49 #include <dt-bindings/reset/sun8i-r40-ccu.h> 50 #include <dt-bindings/reset/sun8i-de2.h> 51 #include <dt-bindings/thermal/thermal.h> [all …]
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D | sun8i-a83t.dtsi | 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/clock/sun8i-a83t-ccu.h> 48 #include <dt-bindings/clock/sun8i-de2.h> 49 #include <dt-bindings/clock/sun8i-r-ccu.h> 50 #include <dt-bindings/reset/sun8i-a83t-ccu.h> 51 #include <dt-bindings/reset/sun8i-de2.h> 52 #include <dt-bindings/reset/sun8i-r-ccu.h> 53 #include <dt-bindings/thermal/thermal.h> 56 interrupt-parent = <&gic>; [all …]
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/linux-6.12.1/drivers/clk/sunxi/ |
D | clk-a20-gmac.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * Copyright 2013 Chen-Yu Tsai 7 * Chen-Yu Tsai <wens@csie.org> 10 #include <linux/clk-provider.h> 29 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module 34 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core 35 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY 36 * Ext. 125MHz RGMII TX clk >--|__divider__/ | 39 * The external 125 MHz reference is optional, i.e. GMAC can use its 40 * internal TX clock just fine. The A31 GMAC clock module does not have [all …]
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/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/ |
D | dwmac-sunxi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * dwmac-sunxi.c - Allwinner sunxi DWMAC specific glue layer 5 * Copyright (C) 2013 Chen-Yu Tsai 7 * Chen-Yu Tsai <wens@csie.org> 11 #include <linux/clk.h> 23 struct clk *tx_clk; 32 struct sunxi_priv_data *gmac = priv; in sun7i_gmac_init() local 35 if (gmac->regulator) { in sun7i_gmac_init() 36 ret = regulator_enable(gmac->regulator); in sun7i_gmac_init() 41 /* Set GMAC interface port mode in sun7i_gmac_init() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a 26 - snps,dwmac-3.610 [all …]
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/linux-6.12.1/drivers/pinctrl/sunxi/ |
D | pinctrl-sun4i-a10.c | 6 * Maxime Ripard <maxime.ripard@free-electrons.com> 18 #include "pinctrl-sunxi.h" 27 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD3 */ 34 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */ 36 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD2 */ 45 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD1 */ 54 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD0 */ 62 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD3 */ 70 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD2 */ 77 SUNXI_FUNCTION(0x3, "spi3"), /* CLK */ [all …]
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/linux-6.12.1/drivers/clk/sunxi-ng/ |
D | ccu-sun4i-a10.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/clk-provider.h> 28 #include "ccu-sun4i-a10.h" 38 .hw.init = CLK_HW_INIT("pll-core", 50 * With sigma-delta modulation for fractional-N on the audio PLL, 73 .hw.init = CLK_HW_INIT("pll-audio-base", 91 .hw.init = CLK_HW_INIT("pll-video0", 106 .hw.init = CLK_HW_INIT("pll-ve", 119 .hw.init = CLK_HW_INIT("pll-ve", 132 .hw.init = CLK_HW_INIT("pll-ddr-base", [all …]
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