Searched +full:sun6i +full:- +full:a31 +full:- +full:ahb1 +full:- +full:clk (Results 1 – 5 of 5) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | allwinner,sun4i-a10-ahb-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
21 - allwinner,sun4i-a10-ahb-clk
22 - allwinner,sun6i-a31-ahb1-clk
23 - allwinner,sun8i-h3-ahb2-clk
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| D | allwinner,sun4i-a10-gates-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
24 - const: allwinner,sun4i-a10-gates-clk
25 - const: allwinner,sun4i-a10-axi-gates-clk
26 - const: allwinner,sun4i-a10-ahb-gates-clk
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| /linux-6.12.1/drivers/clk/sunxi/ |
| D | clk-simple-gates.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
41 number = of_property_count_u32_elems(node, "clock-indices"); in sunxi_simple_gates_setup()
42 of_property_read_u32_index(node, "clock-indices", number - 1, &number); in sunxi_simple_gates_setup()
44 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); in sunxi_simple_gates_setup()
45 if (!clk_data->clks) in sunxi_simple_gates_setup()
48 of_property_for_each_u32(node, "clock-indices", index) { in sunxi_simple_gates_setup()
49 of_property_read_string_index(node, "clock-output-names", in sunxi_simple_gates_setup()
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| D | clk-sunxi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
19 #include "clk-factors.h"
27 * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL1
38 div = req->rate / 6000000; in sun4i_get_pll1_factors()
39 req->rate = 6000000 * div; in sun4i_get_pll1_factors()
42 req->m = 0; in sun4i_get_pll1_factors()
45 if (req->rate >= 768000000 || req->rate == 42000000 || in sun4i_get_pll1_factors()
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| /linux-6.12.1/drivers/clk/sunxi-ng/ |
| D | ccu-sun6i-a31.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
7 * Based on ccu-sun8i-h3.c by Maxime Ripard.
10 #include <linux/clk-provider.h>
30 #include "ccu-sun6i-a31.h"
32 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_cpu_clk, "pll-cpu",
46 * With sigma-delta modulation for fractional-N on the audio PLL,
60 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
70 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video0_clk, "pll-video0",
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