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/linux-6.12.1/drivers/soc/tegra/fuse/
Dtegra-apbmisc.c32 static u32 strapping; variable
88 return strapping; in tegra_read_straps()
179 strapping = readl_relaxed(strapping_base); in tegra_init_apbmisc_resources()
182 pr_err("failed to map strapping options registers\n"); in tegra_init_apbmisc_resources()
187 * tegra_init_apbmisc - Initializes Tegra APBMISC and Strapping registers.
213 /* strapping options */ in tegra_init_apbmisc()
225 pr_warn("Using strapping options registers %pR\n", in tegra_init_apbmisc()
245 pr_err("failed to get strapping options registers\n"); in tegra_init_apbmisc()
303 pr_err("failed to get strapping options registers\n"); in tegra_acpi_init_apbmisc()
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6qdl-sr-som.dtsi119 /* AR8035 pin strapping: IO voltage: pull up */
121 /* AR8035 pin strapping: PHYADDR#0: pull down */
123 /* AR8035 pin strapping: PHYADDR#1: pull down */
125 /* AR8035 pin strapping: MODE#1: pull up */
127 /* AR8035 pin strapping: MODE#3: pull up */
129 /* AR8035 pin strapping: MODE#0: pull down */
Dimx6q-marsboard.dts277 /* AR8035 pin strapping: IO voltage: pull up */
279 /* AR8035 pin strapping: PHYADDR#0: pull down */
281 /* AR8035 pin strapping: PHYADDR#1: pull down */
283 /* AR8035 pin strapping: MODE#1: pull up */
285 /* AR8035 pin strapping: MODE#3: pull up */
287 /* AR8035 pin strapping: MODE#0: pull down */
Dimx6dl-riotboard.dts445 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: IO voltage: pull up */
446 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#0: pull down */
447 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */
448 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#1: pull up */
449 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */
450 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */
Dimx6q-pistachio.dts384 /* AR8035 pin strapping: IO voltage: pull up */
386 /* AR8035 pin strapping: PHYADDR#0: pull down */
388 /* AR8035 pin strapping: PHYADDR#1: pull down */
390 /* AR8035 pin strapping: MODE#1: pull up */
392 /* AR8035 pin strapping: MODE#3: pull up */
394 /* AR8035 pin strapping: MODE#0: pull down */
/linux-6.12.1/Documentation/devicetree/bindings/misc/
Dnvidia,tegra186-misc.yaml14 registers that can be used to identify a given chip and various strapping
29 indicate strapping options
Dnvidia,tegra20-apbmisc.yaml32 indicate strapping options
50 <0x70000008 0x04>; /* Strapping options */
/linux-6.12.1/Documentation/devicetree/bindings/net/dsa/
Dqca8k.yaml49 Ignore power-on pin strapping to configure LED open-drain or EEPROM
51 the OEM has decided not to use pin strapping and falls back to SW regs.
58 OEM does not use pin strapping to set this mode and prefers to set it
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dti,dp83867.yaml94 strapping. The default strapping will use a delay of 2.00 ns. Thus
Dmicrel.txt43 by the FXEN boot strapping pin. It can't be determined from the PHY
Dqca,qca7000.txt30 the QCA7000 is setup via GPIO pin strapping. If the
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dwm8741.txt3 This device supports both I2C and SPI (configured with pin strapping
Dcs4341.txt3 This device supports both I2C and SPI (configured with pin strapping
Dpcm186x.txt3 These devices support both I2C and SPI (configured with pin strapping
Dwlf,wm8750.yaml10 These devices support both I2C and SPI (configured with pin strapping
Dwlf,wm8804.yaml10 This device supports both I2C and SPI (configured with pin strapping on the
Dwlf,wm8994.yaml14 These devices support both I2C and SPI (configured with pin strapping on the
/linux-6.12.1/drivers/clk/
Dclk-aspeed.c595 * strapping in aspeed_ast2400_cc()
615 * HPLL_PARAM register, or set to a specified frequency by strapping. in aspeed_ast2400_cc()
656 /* CLKIN is the crystal oscillator, 24 or 25MHz selected by strapping */ in aspeed_ast2500_cc()
675 WARN(val == 0, "strapping is zero: cannot determine ahb clock"); in aspeed_ast2500_cc()
726 pr_err("failed to read strapping register\n"); in aspeed_cc_init()
/linux-6.12.1/drivers/gpu/drm/bridge/
Dlvds-codec.c162 * its strapping. Handle data-mapping the same way lvds-panel does. In in lvds_codec_probe()
189 * for example OnSemi FIN3385 has a dedicated strapping pin to select in lvds_codec_probe()
/linux-6.12.1/drivers/media/usb/gspca/
Dstk1135.h12 #define STK1135_REG_POSVA 0x010 /* Power-on strapping data */
/linux-6.12.1/drivers/media/usb/stk1160/
Dstk1160-reg.h19 /* Power-on Strapping Data */
/linux-6.12.1/drivers/net/phy/
Dintel-xway.c178 /* Existing behavior was to use default pin strapping delay in rgmii in xway_gphy_rgmii_init()
194 "PHY has delays (e.g. via pin strapping), but phy-mode = 'rgmii'\n" in xway_gphy_rgmii_init()
Drealtek.c418 "%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n", in rtl8211f_config_init()
422 "2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n", in rtl8211f_config_init()
433 "%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n", in rtl8211f_config_init()
437 "2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n", in rtl8211f_config_init()
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-cadence-sierra.yaml77 by hardware strapping, and must match the configuration specified here.
/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-class-watchdog104 h/w strapping (for WDT2 only).

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