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/linux-6.12.1/Documentation/devicetree/bindings/rtc/
Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
18 - st,stm32mp25-rtc
27 clock-names:
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/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp157c-dhcom-pdk2.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E2-CAN2-SDR104-RTC-WBT-T-DSI-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * PDK2 PCB number: 516-400 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-pdk2.dtsi"
19 compatible = "dh,stm32mp157c-dhcom-pdk2", "dh,stm32mp157c-dhcom-som",
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Dstm32mp157c-dhcom-picoitx.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E-CAN2-SD-RTC-T-DSI-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * PicoITX PCB number: 487-600 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-picoitx.dtsi"
19 compatible = "dh,stm32mp157c-dhcom-picoitx", "dh,stm32mp157c-dhcom-som",
28 pinctrl-names = "default", "sleep";
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Dstm32mp153c-dhcom-drc02.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP153C-C065-R102-F0819-SPI-E2-CAN2-RTC-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * DRC02 PCB number: 568-100 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-drc02.dtsi"
19 compatible = "dh,stm32mp153c-dhcom-drc02", "dh,stm32mp153c-dhcom-som",
28 pinctrl-names = "default", "sleep";
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Dstm32mp157a-dk1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157a-dk1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
14 compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
59 /delete-property/ st,syscfg-holdboot;
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Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32mp157c-dk2-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-dk2.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
14 compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
38 phy-dsi-supply = <&scmi_reg18>;
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Dstm32mp157c-ed1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ed1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
14 compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
64 /delete-property/ st,syscfg-holdboot;
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Dstm32mp157c-ev1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ev1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
14 compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
16 reserved-memory {
19 no-map;
38 phy-dsi-supply = <&scmi_reg18>;
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Dstm32mp157a-microgea-stm32mp1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
9 compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
30 no-map;
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Dstm32mp157a-icore-stm32mp1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
9 compatible = "engicam,icore-stm32mp1", "st,stm32mp157";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
30 no-map;
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Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
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/linux-6.12.1/drivers/rtc/
Drtc-stm32.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
18 #include <linux/pinctrl/pinconf-generic.h>
23 #include <linux/rtc.h>
120 /* Max STM32 RTC register offset is 0x3FC */
123 /* STM32 RTC driver time helpers */
126 /* STM32 RTC pinctrl helpers */
157 void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
187 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc) in stm32_rtc_wpr_unlock() argument
189 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock()
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/linux-6.12.1/drivers/clk/stm32/
Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
21 #include <dt-bindings/clock/stm32mp1-clks.h>
23 #include "reset-stm32.h"
171 "ck_hse", "pll4_r", "clk-hse-div2"
397 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
400 cfg->name, in _clk_hw_register_gate()
401 cfg->parent_name, in _clk_hw_register_gate()
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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