Searched +full:stm32h7 +full:- +full:sai (Results 1 – 7 of 7) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/sound/ |
D | st,stm32-sai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Serial Audio Interface (SAI) 10 - Olivier Moysan <olivier.moysan@foss.st.com> 13 The SAI interface (Serial Audio Interface) offers a wide set of audio 14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97. 15 The SAI contains two independent audio sub-blocks. Each sub-block has 21 - st,stm32f4-sai [all …]
|
/linux-6.12.1/arch/arm/boot/dts/st/ |
D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
|
D | stm32mp131.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp13-clks.h> 8 #include <dt-bindings/reset/stm32mp13-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
|
/linux-6.12.1/sound/soc/stm/ |
D | stm32_sai.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * STM32 ALSA SoC Digital Audio Interface (SAI) driver. 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 40 { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 }, 41 { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 }, 47 struct stm32_sai_data *sai = dev_get_drvdata(dev); in stm32_sai_pclk_disable() local 49 clk_disable_unprepare(sai->pclk); in stm32_sai_pclk_disable() 56 struct stm32_sai_data *sai = dev_get_drvdata(dev); in stm32_sai_pclk_enable() local 59 ret = clk_prepare_enable(sai->pclk); in stm32_sai_pclk_enable() 61 dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret); in stm32_sai_pclk_enable() [all …]
|
/linux-6.12.1/drivers/clk/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 98 multi-function device has one fixed-rate oscillator, clocked 129 be pre-programmed to support other configurations and features not yet 178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 196 For example, the CDCE925 contains two PLLs with spread-spectrum 206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 238 bool "Clock driver for BCLK of Freescale SAI cores" 241 This driver supports the Freescale SAI (Synchronous Audio Interface) [all …]
|
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o clkdev.o 4 obj-$(CONFIG_COMMON_CLK) += clk.o 5 obj-$(CONFIG_CLK_KUNIT_TEST) += clk-test.o 6 clk-test-y := clk_test.o \ 8 obj-$(CONFIG_COMMON_CLK) += clk-divider.o 9 obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o 10 obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o 11 obj-$(CONFIG_CLK_FIXED_RATE_KUNIT_TEST) += clk-fixed-rate-test.o 12 clk-fixed-rate-test-y := clk-fixed-rate_test.o kunit_clk_fixed_rate_test.dtbo.o [all …]
|
/linux-6.12.1/drivers/iio/adc/ |
D | stm32-dfsdm-core.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved 23 #include "stm32-dfsdm.h" 26 * struct stm32_dfsdm_dev_data - DFSDM compatible configuration data 30 * @regmap_cfg: SAI register map configuration pointer 113 ret = clk_prepare_enable(priv->clk); in stm32_dfsdm_clk_prepare_enable() 114 if (ret || !priv->aclk) in stm32_dfsdm_clk_prepare_enable() 117 ret = clk_prepare_enable(priv->aclk); in stm32_dfsdm_clk_prepare_enable() 119 clk_disable_unprepare(priv->clk); in stm32_dfsdm_clk_prepare_enable() 128 clk_disable_unprepare(priv->aclk); in stm32_dfsdm_clk_disable_unprepare() [all …]
|