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/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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/linux-6.12.1/drivers/iio/trigger/
Dstm32-lptimer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Trigger driver
9 * Inspired by Benjamin Gaignard's stm32-timer-trigger driver
12 #include <linux/iio/timer/stm32-lptim-trigger.h>
13 #include <linux/mfd/stm32-lptimer.h>
19 /* List Low-Power Timer triggers */
34 if (indio_dev->modes & INDIO_HARDWARE_TRIGGERED) in stm32_lptim_validate_device()
37 return -EINVAL; in stm32_lptim_validate_device()
48 * return true if the trigger is a valid STM32 IIO Low-Power Timer Trigger
53 return (trig->ops == &stm32_lptim_trigger_ops); in is_stm32_lptim_trigger()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 menu "Triggers - standalone"
17 module will be called iio-trig-hrtimer.
26 module will be called iio-trig-interrupt.
29 tristate "STM32 Low-Power Timer Trigger"
32 Select this option to enable STM32 Low-Power Timer Trigger.
33 This can be used as trigger source for STM32 internal ADC
37 module will be called stm32-lptimer-trigger.
40 tristate "STM32 Timer Trigger"
43 Select this option to enable STM32 Timer Trigger
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for triggers not associated with iio-devices
8 obj-$(CONFIG_IIO_HRTIMER_TRIGGER) += iio-trig-hrtimer.o
9 obj-$(CONFIG_IIO_INTERRUPT_TRIGGER) += iio-trig-interrupt.o
10 obj-$(CONFIG_IIO_STM32_LPTIMER_TRIGGER) += stm32-lptimer-trigger.o
11 obj-$(CONFIG_IIO_STM32_TIMER_TRIGGER) += stm32-timer-trigger.o
12 obj-$(CONFIG_IIO_SYSFS_TRIGGER) += iio-trig-sysfs.o
13 obj-$(CONFIG_IIO_TIGHTLOOP_TRIGGER) += iio-trig-loop.o
/linux-6.12.1/drivers/mfd/
Dstm32-lptimer.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
9 #include <linux/mfd/stm32-lptimer.h>
31 * Low-Power Timer supports it. in stm32_lptimer_detect_encoder()
33 ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR, in stm32_lptimer_detect_encoder()
38 ret = regmap_read(ddata->regmap, STM32_LPTIM_CFGR, &val); in stm32_lptimer_detect_encoder()
42 ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR, in stm32_lptimer_detect_encoder()
47 ddata->has_encoder = !!(val & STM32_LPTIM_ENC); in stm32_lptimer_detect_encoder()
54 struct device *dev = &pdev->dev; in stm32_lptimer_probe()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 88pm860x-objs := 88pm860x-core.o 88pm860x-i2c.o
7 obj-$(CONFIG_MFD_88PM860X) += 88pm860x.o
8 obj-$(CONFIG_MFD_88PM800) += 88pm800.o 88pm80x.o
9 obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o
10 obj-$(CONFIG_MFD_88PM886_PMIC) += 88pm886.o
11 obj-$(CONFIG_MFD_ACT8945A) += act8945a.o
12 obj-$(CONFIG_MFD_SM501) += sm501.o
13 obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o
14 obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
57 tristate "Active-semi ACT8945A"
62 Support for the ACT8945A PMIC from Active-semi. This device
63 features three step-down DC/DC converters and four low-dropout
79 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
82 called sun4i-gpadc.
113 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
144 over at91-usart-serial driver and usart-spi-driver. Only one function
160 tristate "Atmel HLCDC (High-end LCD Controller)"
197 tristate "X-Powers AC100"
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/linux-6.12.1/drivers/clocksource/
Dtimer-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
11 #include <linux/mfd/stm32-lptimer.h>
40 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_shutdown()
41 regmap_write(priv->reg, STM32_LPTIM_IER, 0); in stm32_clkevent_lp_shutdown()
43 regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF); in stm32_clkevent_lp_shutdown()
54 /* disable LPTIMER to be able to write into IER register*/ in stm32_clkevent_lp_set_timer()
55 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_set_timer()
57 regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE); in stm32_clkevent_lp_set_timer()
58 /* enable LPTIMER to be able to write into ARR register */ in stm32_clkevent_lp_set_timer()
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/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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/linux-6.12.1/drivers/counter/
Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
15 #include <linux/mfd/stm32-lptimer.h>
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
62 ret = regmap_write(priv->regmap, STM32_LPTIM_ARR, priv->ceiling); in stm32_lptim_set_enable_state()
66 ret = regmap_write(priv->regmap, STM32_LPTIM_CMP, 0); in stm32_lptim_set_enable_state()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
6 obj-$(CONFIG_COUNTER) += counter.o
7 counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
9 obj-$(CONFIG_I8254) += i8254.o
10 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
11 obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
12 obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
13 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
14 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
15 obj-$(CONFIG_TI_EQEP) += ti-eqep.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 tristate "ACCES 104-QUAD-8 driver"
37 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
38 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
41 operation on the respective count value attribute. The 104-QUAD-8
58 module will be called ftm-quaddec.
69 will be called intel-qep.
79 module will be called interrupt-cnt.
91 module will be called microchip-tcb-capture.
98 SoCs. This IP supports both 16-bit and 32-bit phase counting mode
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/linux-6.12.1/drivers/pwm/
Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
30 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
46 if (!state->enabled) { in stm32_pwm_lp_apply()
49 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0); in stm32_pwm_lp_apply()
53 clk_disable(priv->clk); in stm32_pwm_lp_apply()
59 div = (unsigned long long)clk_get_rate(priv->clk) * state->period; in stm32_pwm_lp_apply()
63 dev_dbg(pwmchip_parent(chip), "Can't reach %llu ns\n", state->period); in stm32_pwm_lp_apply()
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/linux-6.12.1/drivers/iio/adc/
Dstm32-dfsdm-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is the ADC part of the STM32 DFSDM driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
10 #include <linux/dma-mapping.h>
11 #include <linux/iio/adc/stm32-dfsdm-adc.h>
14 #include <linux/iio/hw-consumer.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
29 #include "stm32-dfsdm.h"
44 /* Limit filter output resolution to 31 bits. (i.e. sample range is +/-2^30) */
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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