| /linux-6.12.1/drivers/staging/media/atomisp/pci/runtime/pipeline/src/ |
| D | pipeline.c | 49 static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage);
260 /* @brief Add a stage to pipeline.
263 * @param[in] stage_desc The description of the stage
264 * @param[out] stage The successor of the stage.
267 * Add a new stage to a non-NULL pipeline.
268 * The stage consists of an ISP binary or firmware and input and
274 struct ia_css_pipeline_stage **stage) in ia_css_pipeline_create_and_add_stage() argument
294 /* Find the last stage */ in ia_css_pipeline_create_and_add_stage()
299 * stage, if no previous stage, it's an error. in ia_css_pipeline_create_and_add_stage()
313 /* Create the new stage */ in ia_css_pipeline_create_and_add_stage()
[all …]
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| /linux-6.12.1/drivers/staging/media/atomisp/pci/ |
| D | ia_css_isp_params.c | 72 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
76 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
78 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
82 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
92 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
99 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
102 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
109 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
113 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
127 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr2() argument
[all …]
|
| /linux-6.12.1/drivers/thermal/qcom/ |
| D | qcom-spmi-temp-alarm.c | 66 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
76 unsigned int stage; member
78 /* protects .thresh, .stage and chip registers */
86 /* This array maps from GEN2 alarm state to GEN1 alarm stage */
109 * specified over-temperature stage
111 * @stage: Over-temperature stage
115 static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage) in qpnp_tm_decode_temp() argument
117 if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 || in qpnp_tm_decode_temp()
118 stage > STAGE_COUNT) in qpnp_tm_decode_temp()
121 return (*chip->temp_map)[chip->thresh][stage - 1]; in qpnp_tm_decode_temp()
[all …]
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| /linux-6.12.1/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ |
| D | ia_css_pipeline.h | 25 /* Pipeline stage to be executed on SP/ISP */
31 /* SP function for SP stage */
42 /* Pipeline of n stages to be executed on SP/ISP per stage */
69 /* Stage descriptor used to create a new stage in the pipeline */
149 /* @brief Add a stage to pipeline.
152 * @param[in] stage_desc The description of the stage
153 * @param[out] stage The successor of the stage.
156 * Add a new stage to a non-NULL pipeline.
157 * The stage consists of an ISP binary or firmware and input and output
163 struct ia_css_pipeline_stage **stage);
[all …]
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| /linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ |
| D | pipeline.json | 39 …on is stalled and there is an interlock. Stall cycles due to a stall in the Wr stage are excluded",
42 …ion is stalled and there is an interlock. Stall cycles due to a stall in the Wr stage are excluded"
45 …iting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded",
48 …aiting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded"
51 …ock that is caused by a VPU instruction. Stall cycles due to a stall in the Wr stage are excluded",
54 …lock that is caused by a VPU instruction. Stall cycles due to a stall in the Wr stage are excluded"
57 …backend, load. This event counts every cycle where there is a stall in the Wr stage due to a load",
60 … backend, load. This event counts every cycle where there is a stall in the Wr stage due to a load"
63 …ckend, store. This event counts every cycle where there is a stall in the Wr stage due to a store",
66 …ackend, store. This event counts every cycle where there is a stall in the Wr stage due to a store"
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| D | cache.json | 126 "PublicDescription": "Level 1 stage 2 TLB refill",
129 "BriefDescription": "L1 stage 2 TLB refill"
132 "PublicDescription": "Page walk cache level-0 stage-1 hit",
135 "BriefDescription": "Page walk, L0 stage-1 hit"
138 "PublicDescription": "Page walk cache level-1 stage-1 hit",
141 "BriefDescription": "Page walk, L1 stage-1 hit"
144 "PublicDescription": "Page walk cache level-2 stage-1 hit",
147 "BriefDescription": "Page walk, L2 stage-1 hit"
150 "PublicDescription": "Page walk cache level-1 stage-2 hit",
153 "BriefDescription": "Page walk, L1 stage-2 hit"
[all …]
|
| /linux-6.12.1/drivers/watchdog/ |
| D | kempld_wdt.c | 10 * First the pretimeout stage runs out before the timeout stage gets
77 struct kempld_wdt_stage stage[KEMPLD_WDT_MAX_STAGES]; member
103 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_action() argument
109 if (!stage || !stage->mask) in kempld_wdt_set_stage_action()
113 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_action()
122 kempld_write8(pld, KEMPLD_WDT_STAGE_CFG(stage->id), stage_cfg); in kempld_wdt_set_stage_action()
129 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_timeout() argument
141 if (!stage) in kempld_wdt_set_stage_timeout()
149 if (stage_timeout64 > stage->mask) in kempld_wdt_set_stage_timeout()
152 stage_timeout = stage_timeout64 & stage->mask; in kempld_wdt_set_stage_timeout()
[all …]
|
| /linux-6.12.1/arch/riscv/errata/thead/ |
| D | errata.c | 26 static bool errata_probe_mae(unsigned int stage, in errata_probe_mae() argument
35 if (stage != RISCV_ALTERNATIVES_EARLY_BOOT && in errata_probe_mae()
36 stage != RISCV_ALTERNATIVES_MODULE) in errata_probe_mae()
108 static bool errata_probe_cmo(unsigned int stage, in errata_probe_cmo() argument
117 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) in errata_probe_cmo()
120 if (stage == RISCV_ALTERNATIVES_BOOT) { in errata_probe_cmo()
129 static bool errata_probe_pmu(unsigned int stage, in errata_probe_pmu() argument
139 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) in errata_probe_pmu()
145 static u32 thead_errata_probe(unsigned int stage, in thead_errata_probe() argument
150 if (errata_probe_mae(stage, archid, impid)) in thead_errata_probe()
[all …]
|
| /linux-6.12.1/tools/testing/selftests/kvm/aarch64/ |
| D | hypercalls.c | 50 static int stage = TEST_STAGE_REG_IFACE; variable
104 switch (stage) { in guest_test_hvc()
108 "a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%lx, stage = %u", in guest_test_hvc()
109 res.a0, hc_info->func_id, hc_info->arg1, stage); in guest_test_hvc()
113 "a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%lx, stage = %u", in guest_test_hvc()
114 res.a0, hc_info->func_id, hc_info->arg1, stage); in guest_test_hvc()
117 GUEST_FAIL("Unexpected stage = %u", stage); in guest_test_hvc()
124 while (stage != TEST_STAGE_END) { in guest_code()
125 switch (stage) { in guest_code()
136 GUEST_FAIL("Unexpected stage = %u", stage); in guest_code()
[all …]
|
| /linux-6.12.1/tools/testing/selftests/kvm/x86_64/ |
| D | vmx_preemption_timer_test.c | 162 int stage; in main() local
180 for (stage = 1;; stage++) { in main()
198 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", in main()
199 stage, (ulong)uc.args[1]); in main()
201 * If this stage 2 then we should verify the vmx pt expiry in main()
208 if (stage == 2) { in main()
210 pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n", in main()
211 stage, uc.args[2], uc.args[3]); in main()
213 pr_info("Stage %d: L2 PT expiry TSC (%lu) , L2 TSC deadline (%lu)\n", in main()
214 stage, uc.args[4], uc.args[5]); in main()
[all …]
|
| D | set_boot_cpu_id.c | 61 int stage; in run_vcpu() local
63 for (stage = 0; stage < 2; stage++) { in run_vcpu()
70 uc.args[1] == stage + 1, in run_vcpu()
71 "Stage %d: Unexpected register values vmexit, got %lx", in run_vcpu()
72 stage + 1, (ulong)uc.args[1]); in run_vcpu()
76 TEST_ASSERT(stage == 1, in run_vcpu()
77 "Expected GUEST_DONE in stage 2, got stage %d", in run_vcpu()
78 stage); in run_vcpu()
|
| D | hyperv_ipi.c | 90 int stage = 1, ipis_expected[2] = {0}; in sender_guest_code() local
93 GUEST_SYNC(stage++); in sender_guest_code()
107 GUEST_SYNC(stage++); in sender_guest_code()
114 GUEST_SYNC(stage++); in sender_guest_code()
127 GUEST_SYNC(stage++); in sender_guest_code()
136 GUEST_SYNC(stage++); in sender_guest_code()
149 GUEST_SYNC(stage++); in sender_guest_code()
158 GUEST_SYNC(stage++); in sender_guest_code()
172 GUEST_SYNC(stage++); in sender_guest_code()
181 GUEST_SYNC(stage++); in sender_guest_code()
[all …]
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| D | hyperv_tlb_flush.c | 205 int i, stage = 1; in sender_guest_code() local
212 GUEST_SYNC(stage++); in sender_guest_code()
224 GUEST_SYNC(stage++); in sender_guest_code()
238 GUEST_SYNC(stage++); in sender_guest_code()
251 GUEST_SYNC(stage++); in sender_guest_code()
266 GUEST_SYNC(stage++); in sender_guest_code()
281 GUEST_SYNC(stage++); in sender_guest_code()
299 GUEST_SYNC(stage++); in sender_guest_code()
317 GUEST_SYNC(stage++); in sender_guest_code()
338 GUEST_SYNC(stage++); in sender_guest_code()
[all …]
|
| D | hyperv_clock.c | 212 int stage; in main() local
229 for (stage = 1;; stage++) { in main()
241 TEST_ASSERT(stage == 11, "Testing ended prematurely, stage %d", in main()
242 stage); in main()
249 uc.args[1] == stage, in main()
250 "Stage %d: Unexpected register values vmexit, got %lx", in main()
251 stage, (ulong)uc.args[1]); in main()
254 if (stage == 7 || stage == 8 || stage == 10) { in main()
|
| D | smm_test.c | 37 * SMI handler always report back fixed stage SMRAM_STAGE.
136 int stage, stage_reported; in main() local
166 for (stage = 1;; stage++) { in main()
178 TEST_ASSERT(stage_reported == stage || in main()
180 "Unexpected stage: #%x, got %x", in main()
181 stage, stage_reported); in main()
187 if (stage == 8) { in main()
196 if (stage == 10) in main()
|
| /linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_lm.c | 20 /* These register are offset to mixer base + stage base */
37 * for the stage to be setup
39 * @stage: stage index to setup
41 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) in _stage_offset() argument
44 if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) in _stage_offset()
45 return sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
97 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config_combined_alpha() argument
103 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config_combined_alpha()
106 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config_combined_alpha()
116 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config() argument
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/ |
| D | pipeline.json | 39 … is due to an FPU/NEON instruction. Stall cycles due to a stall in the Wr stage (typically awaitin…
42 … is due to an FPU/NEON instruction. Stall cycles due to a stall in the Wr stage (typically awaitin…
45 …to the backend, load.This event counts every cycle there is a stall in the Wr stage due to a load",
48 … to the backend, load.This event counts every cycle there is a stall in the Wr stage due to a load"
51 … the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store",
54 …o the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store"
57 …load, cache miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
60 …load, cache miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
63 …, load, TLB miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
66 …, load, TLB miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
[all …]
|
| /linux-6.12.1/Documentation/leds/ |
| D | leds-sc27xx.rst | 16 for the high stage. To be compatible with the hardware pattern
17 format, we should set brightness as 0 for rise stage, fall
18 stage and low stage.
20 - Min stage duration: 125 ms
21 - Max stage duration: 31875 ms
23 Since the stage duration step is 125 ms, the duration should be
|
| /linux-6.12.1/tools/testing/selftests/kvm/s390x/ |
| D | tprot.c | 63 enum stage { enum
73 enum stage stage; member
139 static enum stage perform_next_stage(int *i, bool mapped_0) in perform_next_stage()
141 enum stage stage = tests[*i].stage; in perform_next_stage() local
145 for (; tests[*i].stage == stage; (*i)++) { in perform_next_stage()
163 return stage; in perform_next_stage()
185 #define HOST_SYNC_NO_TAP(vcpup, stage) \ argument
189 int __stage = (stage); \
199 #define HOST_SYNC(vcpu, stage) \ argument
201 HOST_SYNC_NO_TAP(vcpu, stage); \
[all …]
|
| /linux-6.12.1/tools/testing/selftests/tc-testing/ |
| D | TdcPlugin.py | 43 def adjust_command(self, stage, command): argument
46 print(' -- {}.adjust_command {}'.format(self.sub_class, stage))
48 # if stage == 'pre':
50 # elif stage == 'setup':
52 # elif stage == 'execute':
54 # elif stage == 'verify':
56 # elif stage == 'teardown':
58 # elif stage == 'post':
|
| /linux-6.12.1/drivers/net/wwan/iosm/ |
| D | iosm_ipc_mmio.c | 22 /* CP execution stage */
47 * execution stage into mmio area
51 /* check if exec stage has one of the valid values */
52 static bool ipc_mmio_is_valid_exec_stage(enum ipc_mem_exec_stage stage) in ipc_mmio_is_valid_exec_stage() argument
54 switch (stage) { in ipc_mmio_is_valid_exec_stage()
87 enum ipc_mem_exec_stage stage; in ipc_mmio_init() local
98 /* Check for a valid execution stage to make sure that the boot code in ipc_mmio_init()
102 stage = ipc_mmio_get_exec_stage(ipc_mmio); in ipc_mmio_init()
103 if (ipc_mmio_is_valid_exec_stage(stage)) in ipc_mmio_init()
110 dev_err(ipc_mmio->dev, "invalid exec stage %X", stage); in ipc_mmio_init()
|
| /linux-6.12.1/drivers/net/ethernet/microchip/vcap/ |
| D | vcap_api.h | 17 #define VCAP_CID_INGRESS_L0 1000000 /* Ingress Stage 1 Lookup 0 */
18 #define VCAP_CID_INGRESS_L1 1100000 /* Ingress Stage 1 Lookup 1 */
19 #define VCAP_CID_INGRESS_L2 1200000 /* Ingress Stage 1 Lookup 2 */
20 #define VCAP_CID_INGRESS_L3 1300000 /* Ingress Stage 1 Lookup 3 */
21 #define VCAP_CID_INGRESS_L4 1400000 /* Ingress Stage 1 Lookup 4 */
22 #define VCAP_CID_INGRESS_L5 1500000 /* Ingress Stage 1 Lookup 5 */
24 #define VCAP_CID_PREROUTING_IPV6 3000000 /* Prerouting Stage */
25 #define VCAP_CID_PREROUTING 6000000 /* Prerouting Stage */
27 #define VCAP_CID_INGRESS_STAGE2_L0 8000000 /* Ingress Stage 2 Lookup 0 */
28 #define VCAP_CID_INGRESS_STAGE2_L1 8100000 /* Ingress Stage 2 Lookup 1 */
[all …]
|
| /linux-6.12.1/arch/powerpc/crypto/ |
| D | aesp10-ppc.pl | 122 my ($stage,$outperm,$outmask,$outhead,$outtail)=map("v$_",(7..11));
204 vsel $stage,$outhead,$outtail,$outmask
207 stvx $stage,0,$out
224 vsel $stage,$outhead,$outtail,$outmask
227 stvx $stage,0,$out
241 vsel $stage,$outhead,$outtail,$outmask
244 stvx $stage,0,$out
254 vsel $stage,$outhead,$outtail,$outmask
256 stvx $stage,0,$out
269 vsel $stage,$outhead,$outtail,$outmask
[all …]
|
| /linux-6.12.1/sound/soc/sprd/ |
| D | sprd-pcm-compress.c | 28 /* Stage 0 IRAM buffer size definition */
36 /* Stage 1 DDR buffer size definition */
52 * The Spreadtrum Audio compress offload mode will use 2-stage DMA transfer to
58 * For 2-stage DMA transfer, we can allocate 2 buffers: IRAM buffer (always
77 /* Stage 0 IRAM buffer */
79 /* Stage 1 DDR buffer */
91 /* Stage 0 IRAM buffer received data size */
93 /* Stage 1 DDR buffer received data size */
95 /* Stage 1 DDR buffer pointer */
275 * Configure the DMA engine 2-stage transfer mode. Channel 1 set as the in sprd_platform_compr_set_params()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/ci/ |
| D | test.yml | 94 stage: msm
123 stage: msm
140 stage: msm
154 stage: msm
171 stage: rockchip
219 stage: i915
292 stage: amdgpu
311 stage: mediatek
318 stage: mediatek
323 stage: powervr
[all …]
|