/linux-6.12.1/kernel/rcu/ |
D | srcutiny.c | 27 static int init_srcu_struct_fields(struct srcu_struct *ssp) in init_srcu_struct_fields() argument 29 ssp->srcu_lock_nesting[0] = 0; in init_srcu_struct_fields() 30 ssp->srcu_lock_nesting[1] = 0; in init_srcu_struct_fields() 31 init_swait_queue_head(&ssp->srcu_wq); in init_srcu_struct_fields() 32 ssp->srcu_cb_head = NULL; in init_srcu_struct_fields() 33 ssp->srcu_cb_tail = &ssp->srcu_cb_head; in init_srcu_struct_fields() 34 ssp->srcu_gp_running = false; in init_srcu_struct_fields() 35 ssp->srcu_gp_waiting = false; in init_srcu_struct_fields() 36 ssp->srcu_idx = 0; in init_srcu_struct_fields() 37 ssp->srcu_idx_max = 0; in init_srcu_struct_fields() [all …]
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D | srcutree.c | 76 static void srcu_reschedule(struct srcu_struct *ssp, unsigned long delay); 122 static void init_srcu_struct_data(struct srcu_struct *ssp) in init_srcu_struct_data() argument 134 sdp = per_cpu_ptr(ssp->sda, cpu); in init_srcu_struct_data() 138 sdp->srcu_gp_seq_needed = ssp->srcu_sup->srcu_gp_seq; in init_srcu_struct_data() 139 sdp->srcu_gp_seq_needed_exp = ssp->srcu_sup->srcu_gp_seq; in init_srcu_struct_data() 145 sdp->ssp = ssp; in init_srcu_struct_data() 165 static bool init_srcu_struct_nodes(struct srcu_struct *ssp, gfp_t gfp_flags) in init_srcu_struct_nodes() argument 177 ssp->srcu_sup->node = kcalloc(rcu_num_nodes, sizeof(*ssp->srcu_sup->node), gfp_flags); in init_srcu_struct_nodes() 178 if (!ssp->srcu_sup->node) in init_srcu_struct_nodes() 182 ssp->srcu_sup->level[0] = &ssp->srcu_sup->node[0]; in init_srcu_struct_nodes() [all …]
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/linux-6.12.1/drivers/tty/serial/ |
D | sifive.c | 218 * @ssp: pointer to a struct sifive_serial_port record 221 * IP block base, given a pointer @ssp to a struct sifive_serial_port record. 225 static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp) in __ssp_writel() argument 227 __ssp_early_writel(v, offs, &ssp->port); in __ssp_writel() 232 * @ssp: pointer to a struct sifive_serial_port record 236 * IP block base, given a pointer @ssp to a struct sifive_serial_port record. 242 static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs) in __ssp_readl() argument 244 return __ssp_early_readl(&ssp->port, offs); in __ssp_readl() 249 * @ssp: pointer to a struct sifive_serial_port 258 static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp) in sifive_serial_is_txfifo_full() argument [all …]
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/linux-6.12.1/drivers/soc/pxa/ |
D | ssp.c | 3 * linux/arch/arm/mach-pxa/ssp.c 5 * based on linux/arch/arm/mach-sa1100/ssp.c by Russell King 10 * PXA2xx SSP driver. This provides the generic core for simple 11 * IO-based SSP applications and allows easy port setup for DMA access. 40 struct ssp_device *ssp = NULL; in pxa_ssp_request() local 44 list_for_each_entry(ssp, &ssp_list, node) { in pxa_ssp_request() 45 if (ssp->port_id == port && ssp->use_count == 0) { in pxa_ssp_request() 46 ssp->use_count++; in pxa_ssp_request() 47 ssp->label = label; in pxa_ssp_request() 54 if (&ssp->node == &ssp_list) in pxa_ssp_request() [all …]
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/linux-6.12.1/sound/soc/pxa/ |
D | pxa-ssp.c | 3 * pxa-ssp.c -- ALSA Soc Audio Layer 33 #include "pxa-ssp.h" 36 * SSP audio private data 39 struct ssp_device *ssp; member 53 static void dump_registers(struct ssp_device *ssp) in dump_registers() argument 55 dev_dbg(ssp->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n", in dump_registers() 56 pxa_ssp_read_reg(ssp, SSCR0), pxa_ssp_read_reg(ssp, SSCR1), in dump_registers() 57 pxa_ssp_read_reg(ssp, SSTO)); in dump_registers() 59 dev_dbg(ssp->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n", in dump_registers() 60 pxa_ssp_read_reg(ssp, SSPSP), pxa_ssp_read_reg(ssp, SSSR), in dump_registers() [all …]
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D | pxa-ssp.h | 3 * ASoC PXA SSP port support 9 /* SSP clock sources */ 16 /* SSP audio dividers */ 21 /* SSP ACDS audio dividers values */ 29 /* SSP divider bypass */
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/linux-6.12.1/drivers/mmc/host/ |
D | mxs-mmc.c | 48 struct mxs_ssp ssp; member 64 struct mxs_ssp *ssp = &host->ssp; in mxs_mmc_get_cd() local 75 !(readl(ssp->base + HW_SSP_STATUS(ssp)) & in mxs_mmc_get_cd() 86 struct mxs_ssp *ssp = &host->ssp; in mxs_mmc_reset() local 90 ret = stmp_reset_block(ssp->base); in mxs_mmc_reset() 108 ssp->base + HW_SSP_TIMING(ssp)); in mxs_mmc_reset() 115 writel(ctrl0, ssp->base + HW_SSP_CTRL0); in mxs_mmc_reset() 116 writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp)); in mxs_mmc_reset() 128 struct mxs_ssp *ssp = &host->ssp; in mxs_mmc_request_done() local 132 cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp)); in mxs_mmc_request_done() [all …]
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/linux-6.12.1/include/linux/ |
D | srcu.h | 28 int __init_srcu_struct(struct srcu_struct *ssp, const char *name, 31 #define init_srcu_struct(ssp) \ argument 35 __init_srcu_struct((ssp), #ssp, &__srcu_key); \ 41 int init_srcu_struct(struct srcu_struct *ssp); 54 void call_srcu(struct srcu_struct *ssp, struct rcu_head *head, 56 void cleanup_srcu_struct(struct srcu_struct *ssp); 57 int __srcu_read_lock(struct srcu_struct *ssp) __acquires(ssp); 58 void __srcu_read_unlock(struct srcu_struct *ssp, int idx) __releases(ssp); 59 void synchronize_srcu(struct srcu_struct *ssp); 74 unsigned long get_state_synchronize_srcu(struct srcu_struct *ssp); [all …]
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D | pxa2xx_ssp.h | 5 * This driver supports the following PXA CPU/SSP ports:- 7 * PXA250 SSP 8 * PXA255 SSP, NSSP 9 * PXA26x SSP, NSSP, ASSP 29 * SSP Serial Port Registers 30 * PXA250, PXA255, PXA26x and PXA27x SSP controllers are all slightly different. 34 #define SSCR0 (0x00) /* SSP Control Register 0 */ 35 #define SSCR1 (0x04) /* SSP Control Register 1 */ 36 #define SSSR (0x08) /* SSP Status Register */ 37 #define SSITR (0x0C) /* SSP Interrupt Test Register */ [all …]
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D | srcutiny.h | 55 void synchronize_srcu(struct srcu_struct *ssp); 63 static inline int __srcu_read_lock(struct srcu_struct *ssp) in __srcu_read_lock() argument 68 idx = ((READ_ONCE(ssp->srcu_idx) + 1) & 0x2) >> 1; in __srcu_read_lock() 69 WRITE_ONCE(ssp->srcu_lock_nesting[idx], READ_ONCE(ssp->srcu_lock_nesting[idx]) + 1); in __srcu_read_lock() 74 static inline void synchronize_srcu_expedited(struct srcu_struct *ssp) in synchronize_srcu_expedited() argument 76 synchronize_srcu(ssp); in synchronize_srcu_expedited() 79 static inline void srcu_barrier(struct srcu_struct *ssp) in srcu_barrier() argument 81 synchronize_srcu(ssp); in srcu_barrier() 85 static inline void srcu_torture_stats_print(struct srcu_struct *ssp, in srcu_torture_stats_print() argument 90 idx = ((data_race(READ_ONCE(ssp->srcu_idx)) + 1) & 0x2) >> 1; in srcu_torture_stats_print() [all …]
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/linux-6.12.1/drivers/spi/ |
D | spi-pxa2xx-platform.c | 22 pxa2xx_spi_init_ssp(struct platform_device *pdev, struct ssp_device *ssp, enum pxa_ssp_type type) in pxa2xx_spi_init_ssp() argument 29 ssp->mmio_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in pxa2xx_spi_init_ssp() 30 if (IS_ERR(ssp->mmio_base)) in pxa2xx_spi_init_ssp() 31 return PTR_ERR(ssp->mmio_base); in pxa2xx_spi_init_ssp() 33 ssp->phys_base = res->start; in pxa2xx_spi_init_ssp() 35 ssp->clk = devm_clk_get(dev, NULL); in pxa2xx_spi_init_ssp() 36 if (IS_ERR(ssp->clk)) in pxa2xx_spi_init_ssp() 37 return PTR_ERR(ssp->clk); in pxa2xx_spi_init_ssp() 39 ssp->irq = platform_get_irq(pdev, 0); in pxa2xx_spi_init_ssp() 40 if (ssp->irq < 0) in pxa2xx_spi_init_ssp() [all …]
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D | spi-mxs.c | 59 struct mxs_ssp ssp; member 68 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_setup_transfer() local 77 mxs_ssp_set_clk_rate(ssp, hz); in mxs_spi_setup_transfer() 80 * ssp->clk_rate. Otherwise we would set the rate every transfer in mxs_spi_setup_transfer() 91 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); in mxs_spi_setup_transfer() 97 ssp->base + HW_SSP_CTRL1(ssp)); in mxs_spi_setup_transfer() 99 writel(0x0, ssp->base + HW_SSP_CMD0); in mxs_spi_setup_transfer() 100 writel(0x0, ssp->base + HW_SSP_CMD1); in mxs_spi_setup_transfer() 128 struct mxs_ssp *ssp = &spi->ssp; in mxs_ssp_wait() local 132 reg = readl_relaxed(ssp->base + offset); in mxs_ssp_wait() [all …]
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D | spi-pxa2xx-pci.c | 67 static int pxa2xx_spi_pci_clk_register(struct pci_dev *dev, struct ssp_device *ssp, in pxa2xx_spi_pci_clk_register() argument 72 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id); in pxa2xx_spi_pci_clk_register() 73 ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate); in pxa2xx_spi_pci_clk_register() 74 if (IS_ERR(ssp->clk)) in pxa2xx_spi_pci_clk_register() 75 return PTR_ERR(ssp->clk); in pxa2xx_spi_pci_clk_register() 77 return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk); in pxa2xx_spi_pci_clk_register() 98 struct ssp_device *ssp = &c->ssp; in lpss_spi_setup() local 105 ssp->type = LPSS_BYT_SSP; in lpss_spi_setup() 106 ssp->port_id = 0; in lpss_spi_setup() 111 ssp->type = LPSS_BSW_SSP; in lpss_spi_setup() [all …]
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D | spi-pxa2xx.c | 35 * For testing SSCR1 changes that require SSP restart, basically 308 * Read and write LPSS SSP private registers. Caller must first check that 325 * lpss_ssp_setup - perform LPSS SSP specific setup 328 * Perform LPSS SSP specific setup. This function must be called first if 329 * one is going to use LPSS SSP private registers. 337 drv_data->lpss_base = drv_data->ssp->mmio_base + config->offset; in lpss_ssp_setup() 449 /* Wait until SSP becomes idle before deasserting the CS */ in cs_deassert() 486 pxa_ssp_disable(drv_data->ssp); in pxa2xx_spi_off() 625 dev_err(drv_data->ssp->dev, "%s\n", msg); in int_error_stop() 721 dev_err(drv_data->ssp->dev, "bad message state in interrupt handler\n"); in handle_bad_msg() [all …]
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D | spi-pxa2xx.h | 21 * The platform data for SSP controller devices 36 struct ssp_device ssp; member 44 /* SSP Info */ 45 struct ssp_device *ssp; member 54 /* SSP masks*/ 81 return pxa_ssp_read_reg(drv_data->ssp, reg); in pxa2xx_spi_read() 86 pxa_ssp_write_reg(drv_data->ssp, reg, val); in pxa2xx_spi_write() 135 int pxa2xx_spi_probe(struct device *dev, struct ssp_device *ssp,
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/linux-6.12.1/arch/arm/mach-sa1100/ |
D | ssp.c | 3 * linux/arch/arm/mach-sa1100/ssp.c 7 * Generic SSP driver. This provides the generic core for simple 8 * IO-based SSP applications. 21 #include <asm/hardware/ssp.h> 30 printk(KERN_WARNING "SSP: receiver overrun\n"); in ssp_interrupt() 38 * ssp_write_word - write a word to the SSP port 41 * Wait for a free entry in the SSP transmit FIFO, and write a data 42 * word to the SSP port. Wait for the SSP port to start sending 74 * ssp_read_word - read a word from the SSP port 76 * Wait for a data word in the SSP receive FIFO, and return the [all …]
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/linux-6.12.1/arch/x86/kernel/ |
D | shstk.c | 50 static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) in create_rstor_token() argument 55 if (!IS_ALIGNED(ssp, 8)) in create_rstor_token() 58 addr = ssp - SS_FRAME_SIZE; in create_rstor_token() 61 * SSP is aligned, so reserved bits and mode bit are a zero, just mark in create_rstor_token() 64 ssp |= BIT(0); in create_rstor_token() 66 if (write_user_shstk_64((u64 __user *)addr, (u64)ssp)) in create_rstor_token() 79 * The shadow stack pointer(SSP) is moved by CALL, RET, and INCSSPQ. The 86 * and INCSSP. In addition to modifying SSP, INCSSP also reads from the 90 * READ_ONCE(ssp); // read+discard top element on stack 91 * ssp += nr_to_pop * 8; // move the shadow stack [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/spi/ |
D | marvell,mmp2-ssp.yaml | 5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml# 8 title: PXA2xx SSP SPI Controller 16 - marvell,mmp2-ssp 17 - mrvl,ce4100-ssp 18 - mvrl,pxa168-ssp 19 - mrvl,pxa25x-ssp 21 - mrvl,pxa27x-ssp 22 - mrvl,pxa3xx-ssp 23 - mrvl,pxa910-ssp 65 const: marvell,mmp2-ssp [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | marvell,dove-pinctrl.txt | 30 mpp10 10 gpio, pmu, ssp(sclk), pmu* 36 ssp(extclk), pmu* 37 mpp14 14 gpio, pmu, uart2(txd), sdio1(buspwr), ssp(rxd), pmu* 38 mpp15 15 gpio, pmu, uart2(rxd), sdio1(ledctrl), ssp(sfrm), pmu* 47 uart1(cts), ssp(sfrm) 49 lcd-spi(mosi), uart1(cts), ssp(txd) 51 lcd-spi(sck), ssp(sclk) 55 mpp_audio1 52-57 gpio, i2s1/spdifo, i2s1, spdifo, twsi, ssp/spdifo, ssp, 56 ssp/twsi 85 - ssp/spdifo : ssp on pins 52-55, spdifo on pin 57, no gpios [all …]
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/linux-6.12.1/drivers/clk/mxs/ |
D | clk-ssp.c | 21 void mxs_ssp_set_clk_rate(struct mxs_ssp *ssp, unsigned int rate) in mxs_ssp_set_clk_rate() argument 27 ssp_clk = clk_get_rate(ssp->clk); in mxs_ssp_set_clk_rate() 37 dev_err(ssp->dev, in mxs_ssp_set_clk_rate() 44 val = readl(ssp->base + HW_SSP_TIMING(ssp)); in mxs_ssp_set_clk_rate() 48 writel(val, ssp->base + HW_SSP_TIMING(ssp)); in mxs_ssp_set_clk_rate() 50 ssp->clk_rate = ssp_sck; in mxs_ssp_set_clk_rate() 52 dev_dbg(ssp->dev, in mxs_ssp_set_clk_rate()
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/linux-6.12.1/Documentation/devicetree/bindings/sound/ |
D | mrvl,pxa-ssp.txt | 1 Marvell PXA SSP CPU DAI bindings 5 compatible Must be "mrvl,pxa-ssp-dai" 6 port A phandle reference to a PXA ssp upstream device 20 ssp1: ssp@41000000 { 21 compatible = "mrvl,pxa3xx-ssp"; 24 clock-names = "pxa27x-ssp.0"; 30 compatible = "mrvl,pxa-ssp-dai";
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/linux-6.12.1/drivers/iio/common/ssp_sensors/ |
D | Kconfig | 3 # SSP sensor drivers and commons configuration 5 menu "SSP Sensor Common" 8 tristate "Commons for all SSP Sensor IIO drivers" 13 Say yes here to build commons for SSP sensors. 22 SSP driver for sensorhub. 23 If you say yes here you get ssp support for sensorhub.
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/linux-6.12.1/sound/soc/intel/boards/ |
D | sof_ssp_amp.c | 52 /* BE ID defined in sof-tgl-rt1308-hdmi-ssp.m4 */ 185 /* SSP 1 and SSP 5 are used for HDMI IN */ 198 /* SSP 0 and SSP 2 are used for HDMI IN */ 204 /* SSP 0 and SSP 2 are used for HDMI IN */ 210 /* SSP 0 and SSP 2 are used for HDMI IN */ 216 /* SSP 0 and SSP 2 are used for HDMI IN */
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D | sof_board_helpers.h | 10 #include <sound/soc-acpi-intel-ssp-common.h> 18 /* SSP port number for headphone codec: 3 bits */ 24 /* SSP port number for speaker amplifier: 3 bits */ 30 /* SSP port number for BT audio offload: 3 bits */ 36 /* SSP port mask for HDMI capture: 6 bits */ 120 * @ssp_codec: ssp port number of headphone BE link 121 * @ssp_amp: ssp port number of speaker BE link 122 * @ssp_bt: ssp port number of BT offload BE link 123 * @ssp_mask_hdmi_in: ssp port mask of HDMI-IN BE link
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/linux-6.12.1/sound/soc/intel/catpt/ |
D | registers.h | 35 #define CATPT_CS_SFCR(ssp) BIT(27 + (ssp)) argument 39 #define CATPT_CS_SDPM(ssp) BIT(11 + (ssp)) argument 44 #define CATPT_CS_SBCS(ssp) BIT(2 + (ssp)) argument 113 /* defaults to reset SSP registers to after each power cycle */ 144 #define catpt_ssp_addr(cdev, ssp) \ argument 145 ((cdev)->lpe_ba + (cdev)->spec->host_ssp_offset[ssp]) 151 #define catpt_writel_ssp(cdev, ssp, reg, val) \ argument 152 writel(val, catpt_ssp_addr(cdev, ssp) + (reg))
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