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/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
12 controller specific like delay in clock or data lines, etc. These properties
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
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/linux-6.12.1/Documentation/devicetree/bindings/input/
Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
16 devices using different transports (I2C, SPI) and different functions (e.g.
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
[all …]
/linux-6.12.1/drivers/iio/gyro/
Dadxrs450.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
25 /* The MSB for the spi commands */
67 * struct adxrs450_state - device instance specific data
68 * @us: actual spi_device
69 * @buf_lock: mutex to protect tx and rx
71 * @rx: receive buffer
74 struct spi_device *us; member
77 __be32 rx; member
[all …]
/linux-6.12.1/drivers/spi/
Dspi-dw-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
15 #include <linux/platform_data/dma-dw.h>
16 #include <linux/spi/spi.h>
19 #include "spi-dw.h"
30 if (s->dma_dev != chan->device->dev) in dw_spi_dma_chan_filter()
33 chan->private = s; in dw_spi_dma_chan_filter()
43 def_burst = dws->fifo_len / 2; in dw_spi_dma_maxburst_init()
45 ret = dma_get_slave_caps(dws->rxchan, &caps); in dw_spi_dma_maxburst_init()
51 dws->rxburst = min(max_burst, def_burst); in dw_spi_dma_maxburst_init()
[all …]
Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Designware SPI core controller driver (refer pxa2xx_spi.c)
10 #include <linux/dma-mapping.h>
15 #include <linux/delay.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/spi-mem.h>
23 #include "spi-dw.h"
32 u32 rx_sample_dly; /* RX sample delay */
66 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
67 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
[all …]
Dspi-mpc512x-psc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC512x PSC in SPI mode driver.
7 * Hongjun Chen <hong-jun.chen@freescale.com>
21 #include <linux/delay.h>
23 #include <linux/spi/spi.h>
37 switch (mps->type) { \
39 struct mpc52xx_psc __iomem *psc = mps->psc; \
40 __ret = &psc->regname; \
44 struct mpc5125_psc __iomem *psc = mps->psc; \
45 __ret = &psc->regname; \
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Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
8 #include <linux/delay.h>
10 #include <linux/dma-mapping.h>
21 #include <linux/spi/spi.h>
26 #include <linux/dma/imx-dma.h>
38 "time in us to run a transfer in polling mode\n");
74 int (*prepare_transfer)(struct spi_imx_data *spi_imx, struct spi_device *spi);
110 void (*rx)(struct spi_imx_data *spi_imx); member
133 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
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Dspi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
14 #include <linux/spi/spi.h>
18 #define DRIVER_NAME "rockchip-spi"
25 /* SPI register offsets */
67 /* ss_n to sclk_out delay */
154 /* sclk_out: spi host internal logic in rk3x can support 50Mhz */
158 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
180 void *rx; member
195 bool cs_inactive; /* spi target tansmition stop when cs inactive */
[all …]
/linux-6.12.1/net/nfc/nci/
Dspi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/spi/spi.h>
12 #include <linux/crc-ccitt.h>
37 /* a NULL skb means we just want the SPI chip select line to raise */ in __nci_spi_send()
39 t.tx_buf = skb->data; in __nci_spi_send()
40 t.len = skb->len; in __nci_spi_send()
47 t.delay.value = nspi->xfer_udelay; in __nci_spi_send()
48 t.delay.unit = SPI_DELAY_UNIT_USECS; in __nci_spi_send()
49 t.speed_hz = nspi->xfer_speed_hz; in __nci_spi_send()
54 return spi_sync(nspi->spi, &m); in __nci_spi_send()
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/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp151c-mect1s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
21 stdout-path = "serial0:1500000n8";
33 v3v3: regulator-v3v3 {
34 compatible = "regulator-fixed";
[all …]
Dstm32mp151a-prtt1c.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
14 clock_ksz9031: clock-ksz9031 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <25000000>;
20 clock_sja1105: clock-sja1105 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7986a-acelink-ew-7886cax.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
11 compatible = "acelink,ew-7886cax", "mediatek,mt7986a";
12 model = "Acelink EW-7886CAX";
19 stdout-path = "serial0:115200n8";
28 compatible = "gpio-keys";
30 key-restart {
[all …]
Dmt8395-kontron-3-5-sbc-i1200.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
16 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
17 #include <dt-bindings/spmi/spmi.h>
20 model = "Kontron 3.5\"-SBC-i1200";
21 compatible = "kontron,3-5-sbc-i1200", "mediatek,mt8395", "mediatek,mt8195";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
[all …]
Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/firmware/qcom,scm.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/phy/phy-qcom-qmp.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
[all …]
/linux-6.12.1/include/linux/iio/imu/
Dadis.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
13 #include <linux/spi/spi.h>
28 * struct adis_timeouts - ADIS chip variant timeouts
29 * @reset_ms - Wait time after rst pin goes inactive
30 * @sw_reset_ms - Wait time after sw reset command
31 * @self_test_ms - Wait time after self test command
40 * struct adis_data - ADIS chip variant specific data
41 * @read_delay: SPI delay for read operations in us
42 * @write_delay: SPI delay for write operations in us
[all …]
/linux-6.12.1/Documentation/networking/
Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
43 TX ring cause delay. Drivers usually delay cleaning up the
44 ring-buffers for various performance reasons, and packets stalling
48 (Intel 82599 chip). This driver (ixgbe) combines TX+RX ring cleanups,
49 and the cleanup interval is affected by the ethtool --coalesce setting
50 of parameter "rx-usecs".
54 # ethtool -C ethX rx-usecs 30
[all …]
/linux-6.12.1/drivers/iio/adc/
Dmax1241.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MAX1241 low-power, 12-bit serial ADC
5 * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf
8 #include <linux/delay.h>
13 #include <linux/spi/spi.h>
23 struct spi_device *spi; member
46 * tconv us. in max1241_read()
50 .delay.value = 8, in max1241_read()
51 .delay.unit = SPI_DELAY_UNIT_USECS, in max1241_read()
54 * Then read two bytes of data in our RX buffer. in max1241_read()
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/
Dac14xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
18 model = "PHYTEC phyCORE-AM64x";
19 compatible = "phytec,am64-phycore-som", "ti,am642";
32 reserved_memory: reserved-memory {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mq-kontron-pitx-imx8m.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree File for the Kontron pitx-imx8m board.
8 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
14 model = "Kontron pITX-imx8m";
15 compatible = "kontron,pitx-imx8m", "fsl,imx8mq";
31 stdout-path = "serial2:115200n8";
34 pcie0_refclk: pcie0-clock {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
Dimx8mp-msc-sm2s.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/net/ti-dp83867.h>
18 stdout-path = &uart2;
21 reg_usb0_host_vbus: regulator-usb0-vbus {
22 compatible = "regulator-fixed";
23 regulator-name = "usb0_host_vbus";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_usb0_vbus>;
26 regulator-min-microvolt = <5000000>;
[all …]
/linux-6.12.1/drivers/input/rmi4/
Drmi_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2016 Synaptics Incorporated
11 #include <linux/spi/spi.h>
38 struct spi_device *spi; member
55 struct spi_device *spi = rmi_spi->spi; in rmi_spi_manage_pools() local
56 int buf_size = rmi_spi->xfer_buf_size in rmi_spi_manage_pools()
57 ? rmi_spi->xfer_buf_size : RMI_SPI_DEFAULT_XFER_BUF_SIZE; in rmi_spi_manage_pools()
68 tmp = rmi_spi->rx_buf; in rmi_spi_manage_pools()
69 buf = devm_kcalloc(&spi->dev, buf_size, 2, in rmi_spi_manage_pools()
72 return -ENOMEM; in rmi_spi_manage_pools()
[all …]

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