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/linux-6.12.1/drivers/spi/
Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
21 #include <linux/spi/spi.h>
25 /* STM32F4/7 SPI registers */
81 /* STM32F4 SPI Baud Rate min/max divisor */
85 /* STM32H7 SPI registers */
157 /* STM32MP25 SPI registers bit fields */
171 /* STM32H7 SPI Master Baud Rate min/max divisor */
175 /* STM32H7 SPI Communication mode */
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Dspi-davinci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/dma-mapping.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/spi_bitbang.h>
22 #include <linux/platform_data/spi-davinci.h>
88 /* SPI Controller registers */
103 /* SPI Controller driver's private data. */
110 void __iomem *base; member
136 if (dspi->rx) { in davinci_spi_rx_buf_u8()
137 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8()
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Dspi-mxs.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Freescale MXS SPI host driver
15 // Based on code from U-Boot bootloader by:
18 // Based on spi-stmp.c, which is:
28 #include <linux/dma-mapping.h>
39 #include <linux/spi/spi.h>
40 #include <linux/spi/mxs-spi.h>
41 #include <trace/events/spi.h>
42 #include <linux/dma/mxs-dma.h>
44 #define DRIVER_NAME "mxs-spi"
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Dspi-oc-tiny.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OpenCores tiny SPI host driver
19 #include <linux/spi/spi.h>
20 #include <linux/spi/spi_bitbang.h>
21 #include <linux/spi/spi_oc_tiny.h>
41 void __iomem *base; member
56 return spi_controller_get_devdata(sdev->controller); in tiny_spi_to_hw()
59 static unsigned int tiny_spi_baud(struct spi_device *spi, unsigned int hz) in tiny_spi_baud() argument
61 struct tiny_spi *hw = tiny_spi_to_hw(spi); in tiny_spi_baud()
63 return min(DIV_ROUND_UP(hw->freq, hz * 2), (1U << hw->baudwidth)) - 1; in tiny_spi_baud()
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Dspi-mt65xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/platform_data/spi-mt65xx.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi-mem.h>
22 #include <linux/dma-mapping.h>
115 * struct mtk_spi_compatible - device data structure
116 * @need_pad_sel: Enable pad (pins) selection in SPI controller
120 * @no_need_unprepare: Don't unprepare the SPI clk during runtime
133 * struct mtk_spi - SPI driver instance
134 * @base: Start address of the SPI controller registers
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Dspi-ar934x.c1 // SPDX-License-Identifier: GPL-2.0
3 // SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs
7 // Based on spi-mt7621.c:
9 // Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
10 // Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name>
19 #include <linux/spi/spi.h>
21 #define DRIVER_NAME "spi-ar934x"
46 void __iomem *base; member
53 int div = DIV_ROUND_UP(sp->clk_freq, freq * 2) - 1; in ar934x_spi_clk_div()
58 return -EINVAL; in ar934x_spi_clk_div()
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Dspi-st-ssc4.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
9 * SPI host mode controller driver, used in STMicroelectronics devices.
22 #include <linux/spi/spi.h>
23 #include <linux/spi/spi_bitbang.h>
54 /* SSC SPI Controller */
55 void __iomem *base; member
59 /* SSC SPI current transaction */
74 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
77 count = spi_st->words_remaining; in ssc_write_tx_fifo()
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Dspi-geni-qcom.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
6 #include <linux/dma-mapping.h>
7 #include <linux/dma/qcom-gpi-dma.h>
16 #include <linux/soc/qcom/geni-se.h>
17 #include <linux/spi/spi.h>
20 /* SPI SE specific registers and respective register fields */
59 /* M_CMD OP codes for SPI */
66 /* M_CMD params for SPI */
108 struct geni_se *se = &mas->se; in spi_slv_setup()
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Dspi-uniphier.c1 // SPDX-License-Identifier: GPL-2.0
2 // spi-uniphier.c - Socionext UniPhier SPI controller driver
4 // Copyright 2016-2018 Socionext Inc.
16 #include <linux/spi/spi.h>
26 void __iomem *base; member
113 val = readl(priv->base + SSI_IE); in uniphier_spi_irq_enable()
115 writel(val, priv->base + SSI_IE); in uniphier_spi_irq_enable()
123 val = readl(priv->base + SSI_IE); in uniphier_spi_irq_disable()
125 writel(val, priv->base + SSI_IE); in uniphier_spi_irq_disable()
128 static void uniphier_spi_set_mode(struct spi_device *spi) in uniphier_spi_set_mode() argument
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Dspi-slave-mt27xx.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include <linux/dma-mapping.h>
12 #include <linux/spi/spi.h>
68 void __iomem *base; member
90 { .compatible = "mediatek,mt2712-spi-slave",
92 { .compatible = "mediatek,mt8195-spi-slave",
102 reg_val = readl(mdata->base + SPIS_DMA_CFG_REG); in mtk_spi_slave_disable_dma()
105 writel(reg_val, mdata->base + SPIS_DMA_CFG_REG); in mtk_spi_slave_disable_dma()
112 reg_val = readl(mdata->base + SPIS_CFG_REG); in mtk_spi_slave_disable_xfer()
115 writel(reg_val, mdata->base + SPIS_CFG_REG); in mtk_spi_slave_disable_xfer()
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Dspi-qup.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014, The Linux foundation. All rights reserved.
8 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
118 #define SPI_MAX_XFER (SZ_64K - 64)
130 void __iomem *base; member
146 int w_size; /* bytes per SPI word */
161 static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer);
165 u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_is_flag_set()
181 return controller->n_words * controller->w_size; in spi_qup_len()
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Dspi-omap2-mcspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/dma-mapping.h>
28 #include <linux/spi/spi.h>
32 #include <linux/platform_data/spi-omap2-mcspi.h>
49 /* per-channel banks, 0x14 bytes each, first is: */
56 /* per-register bitmasks: */
123 /* Virtual base address of the controller */
124 void __iomem *base; member
140 void __iomem *base; member
154 writel_relaxed(val, mcspi->base + idx); in mcspi_write_reg()
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Dspi-mt7621.c1 // SPDX-License-Identifier: GPL-2.0
3 // spi-mt7621.c -- MediaTek MT7621 SPI controller driver
6 // Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
7 // Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name>
9 // Some parts are based on spi-orion.c:
11 // Copyright (C) 2007-2008 Marvell Ltd.
21 #include <linux/spi/spi.h>
23 #define DRIVER_NAME "spi-mt7621"
59 void __iomem *base; member
65 static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi) in spidev_to_mt7621_spi() argument
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Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
10 #include <linux/dma-mapping.h>
21 #include <linux/spi/spi.h>
26 #include <linux/dma/imx-dma.h>
74 int (*prepare_transfer)(struct spi_imx_data *spi_imx, struct spi_device *spi);
97 void __iomem *base; member
133 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
138 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
143 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
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Dspi-ath79.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
5 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
7 * This driver has been based on the spi-gpio.c:
17 #include <linux/spi/spi.h>
18 #include <linux/spi/spi-mem.h>
19 #include <linux/spi/spi_bitbang.h>
24 #define DRV_NAME "ath79-spi"
30 #define AR71XX_SPI_REG_CTRL 0x04 /* SPI Control */
31 #define AR71XX_SPI_REG_IOC 0x08 /* SPI I/O Control */
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Dspi-npcm-pspi.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/spi/spi.h>
26 void __iomem *base; member
37 #define DRIVER_NAME "npcm-pspi"
70 val = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_enable()
72 iowrite16(val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_enable()
79 val = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_disable()
81 iowrite16(val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_irq_disable()
88 val = ioread16(priv->base + NPCM_PSPI_CTL1); in npcm_pspi_enable()
90 iowrite16(val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_enable()
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Dspi-axi-spi-engine.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI-Engine SPI controller driver
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
10 #include <linux/fpga/adi-axi-common.h>
17 #include <linux/spi/spi.h>
62 /* Arbitrary sync ID for use by host->cur_msg */
87 * struct spi_engine_message_state - SPI engine per-message state
114 void __iomem *base; member
125 p->length++; in spi_engine_program_add_cmd()
128 p->instructions[p->length - 1] = cmd; in spi_engine_program_add_cmd()
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Dspi-altera-dfl.c1 // SPDX-License-Identifier: GPL-2.0
3 // DFL bus driver for Altera SPI Master
19 #include <linux/io-64-nonatomic-lo-hi.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/altera.h>
52 void __iomem *base = context; in indirect_bus_reg_read() local
56 writeq((reg >> 2) | INDIRECT_RD, base + INDIRECT_ADDR); in indirect_bus_reg_read()
59 while ((readq(base + INDIRECT_ADDR) & INDIRECT_RD) && in indirect_bus_reg_read()
65 return -ETIME; in indirect_bus_reg_read()
68 v = readq(base + INDIRECT_RD_DATA); in indirect_bus_reg_read()
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Dspi-sprd.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/dma-mapping.h>
7 #include <linux/dma/sprd-dma.h>
17 #include <linux/spi/spi.h>
151 void __iomem *base; member
177 * SPI transmission time. in sprd_spi_transfer_max_timeout()
179 u32 size = t->bits_per_word * SPRD_SPI_FIFO_SIZE; in sprd_spi_transfer_max_timeout()
180 u32 bit_time_us = DIV_ROUND_UP(USEC_PER_SEC, ss->hw_speed_hz); in sprd_spi_transfer_max_timeout()
183 * There is an interval between data and the data in our SPI hardware, in sprd_spi_transfer_max_timeout()
186 u32 interval_cycle = SPRD_SPI_FIFO_SIZE * ss->word_delay; in sprd_spi_transfer_max_timeout()
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Dspi-ti-qspi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
15 #include <linux/dma-mapping.h>
17 #include <linux/omap-dma.h>
30 #include <linux/spi/spi.h>
31 #include <linux/spi/spi-mem.h>
44 void __iomem *base; member
87 #define QSPI_WLEN(n) ((n - 1) << 19)
94 #define QSPI_FLEN(n) ((n - 1) << 0)
129 return readl(qspi->base + reg); in ti_qspi_read()
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Dspi-xlp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2003-2015 Broadcom Corporation
11 #include <linux/spi/spi.h>
14 /* SPI Configuration Register */
25 /* SPI Frequency Divider Register */
28 /* SPI Command Register */
37 /* SPI Status Register */
47 /* SPI Interrupt Enable Register */
55 /* SPI FIFO Threshold Register */
58 /* SPI FIFO Word Count Register */
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Dspi-meson-spicc.c2 * Driver for Amlogic Meson SPI communication controller (SPICC)
7 * SPDX-License-Identifier: GPL-2.0+
12 #include <linux/clk-provider.h>
19 #include <linux/spi/spi.h>
30 * - all transfers are cutted in 16 words burst because the FIFO hangs on
31 * TX underflow, and there is no TX "Half-Empty" interrupt, so we go by
33 * - CS management is dumb, and goes UP between every burst, so is really a
69 #define SPICC_TH_EN BIT(1) /* TX FIFO Half-Full Interrupt */
72 #define SPICC_RH_EN BIT(4) /* RX FIFO Half-Full Interrupt */
89 #define SPICC_TH BIT(1) /* TX FIFO Half-Full Interrupt */
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/linux-6.12.1/sound/pci/hda/
Dcs35l56_hda_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // CS35L56 HDA audio driver SPI binding
10 #include <linux/spi/spi.h>
14 static int cs35l56_hda_spi_probe(struct spi_device *spi) in cs35l56_hda_spi_probe() argument
16 const struct spi_device_id *id = spi_get_device_id(spi); in cs35l56_hda_spi_probe()
20 cs35l56 = devm_kzalloc(&spi->dev, sizeof(*cs35l56), GFP_KERNEL); in cs35l56_hda_spi_probe()
22 return -ENOMEM; in cs35l56_hda_spi_probe()
24 cs35l56->base.dev = &spi->dev; in cs35l56_hda_spi_probe()
27 cs35l56->base.can_hibernate = true; in cs35l56_hda_spi_probe()
29 cs35l56->base.regmap = devm_regmap_init_spi(spi, &cs35l56_regmap_spi); in cs35l56_hda_spi_probe()
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/linux-6.12.1/sound/soc/codecs/
Dcs35l56-spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // CS35L56 ALSA SoC audio driver SPI binding
12 #include <linux/spi/spi.h>
17 static int cs35l56_spi_probe(struct spi_device *spi) in cs35l56_spi_probe() argument
23 cs35l56 = devm_kzalloc(&spi->dev, sizeof(struct cs35l56_private), GFP_KERNEL); in cs35l56_spi_probe()
25 return -ENOMEM; in cs35l56_spi_probe()
27 spi_set_drvdata(spi, cs35l56); in cs35l56_spi_probe()
28 cs35l56->base.regmap = devm_regmap_init_spi(spi, regmap_config); in cs35l56_spi_probe()
29 if (IS_ERR(cs35l56->base.regmap)) { in cs35l56_spi_probe()
30 ret = PTR_ERR(cs35l56->base.regmap); in cs35l56_spi_probe()
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/linux-6.12.1/Documentation/devicetree/bindings/net/dsa/
Dnxp,sja1105.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
11 least one half of t_CLK. At an SPI frequency of 1MHz, this means a minimum
12 cs_sck_delay of 500ns. Ensuring that this SPI timing requirement is observed
13 depends on the SPI bus master driver.
16 - Vladimir Oltean <vladimir.oltean@nxp.com>
21 - nxp,sja1105e
22 - nxp,sja1105t
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