| /linux-6.12.1/drivers/soc/tegra/fuse/ |
| D | Makefile | 6 obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += speedo-tegra20.o
7 obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += speedo-tegra30.o
8 obj-$(CONFIG_ARCH_TEGRA_114_SOC) += speedo-tegra114.o
9 obj-$(CONFIG_ARCH_TEGRA_124_SOC) += speedo-tegra124.o
10 obj-$(CONFIG_ARCH_TEGRA_132_SOC) += speedo-tegra124.o
11 obj-$(CONFIG_ARCH_TEGRA_210_SOC) += speedo-tegra210.o
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| D | speedo-tegra210.c | 116 /* Read speedo/IDDQ fuses */ in tegra210_init_speedo_data()
126 * Determine CPU, GPU and SoC speedo values depending on speedo fusing in tegra210_init_speedo_data()
127 * revision. Note that GPU speedo value is fused in CPU_SPEEDO_2. in tegra210_init_speedo_data()
130 pr_info("Speedo Revision %u\n", speedo_revision); in tegra210_init_speedo_data()
149 WARN(1, "speedo value not fused\n"); in tegra210_init_speedo_data()
167 pr_debug("Tegra GPU Speedo ID=%d, Speedo Value=%d\n", in tegra210_init_speedo_data()
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| D | speedo-tegra124.c | 115 pr_warn("Tegra Warning: Speedo value not fused.\n"); in tegra124_init_speedo_data()
120 /* GPU Speedo is stored in CPU_SPEEDO_2 */ in tegra124_init_speedo_data()
146 pr_debug("Tegra GPU Speedo ID=%d, Speedo Value=%d\n", in tegra124_init_speedo_data()
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| D | speedo-tegra30.c | 249 pr_debug("Tegra CPU speedo value %u\n", cpu_speedo_val); in tegra30_init_speedo_data()
250 pr_debug("Tegra Core speedo value %u\n", soc_speedo_val); in tegra30_init_speedo_data()
259 pr_warn("Tegra CPU speedo value %3d out of range", in tegra30_init_speedo_data()
272 pr_warn("Tegra SoC speedo value %3d out of range", in tegra30_init_speedo_data()
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| D | speedo-tegra20.c | 77 pr_debug("Tegra CPU speedo value %u\n", val); in tegra20_init_speedo_data()
92 pr_debug("Core speedo value %u\n", val); in tegra20_init_speedo_data()
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| D | fuse-tegra.c | 124 pr_debug("Tegra CPU Speedo ID %d, SoC Speedo ID %d\n", in tegra_fuse_print_sku_info()
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| /linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/volt/ |
| D | gk20a.c | 49 * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
52 gk20a_volt_get_cvb_voltage(int speedo, int s_scale, const struct cvb_coef *coef) in gk20a_volt_get_cvb_voltage() argument
56 mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale); in gk20a_volt_get_cvb_voltage()
57 mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0; in gk20a_volt_get_cvb_voltage()
63 * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
64 * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
67 gk20a_volt_get_cvb_t_voltage(int speedo, int temp, int s_scale, int t_scale, in gk20a_volt_get_cvb_t_voltage() argument
72 cvb_mv = gk20a_volt_get_cvb_voltage(speedo, s_scale, coef); in gk20a_volt_get_cvb_t_voltage()
74 mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 + in gk20a_volt_get_cvb_t_voltage()
81 gk20a_volt_calc_voltage(const struct cvb_coef *coef, int speedo) in gk20a_volt_calc_voltage() argument
[all …]
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| D | base.c | 115 if (volt->speedo < 0) in nvkm_volt_map()
116 return volt->speedo; in nvkm_volt_map()
120 result += div64_s64((s64)info.arg[1] * volt->speedo, 10); in nvkm_volt_map()
121 result += div64_s64((s64)info.arg[2] * volt->speedo * volt->speedo, 100000); in nvkm_volt_map()
127 result += ((s64)info.arg[1] * volt->speedo * 15625) >> 18; in nvkm_volt_map()
129 result += ((s64)info.arg[3] * volt->speedo * temp * 15625) >> 18; in nvkm_volt_map()
130 result += ((s64)info.arg[4] * volt->speedo * volt->speedo * 15625) >> 30; in nvkm_volt_map()
259 volt->speedo = nvkm_volt_speedo_read(volt); in nvkm_volt_oneinit()
260 if (volt->speedo > 0) in nvkm_volt_oneinit()
261 nvkm_debug(&volt->subdev, "speedo %x\n", volt->speedo); in nvkm_volt_oneinit()
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| D | gf100.c | 44 if (volt->speedo <= 0) in gf100_volt_oneinit()
45 nvkm_error(subdev, "couldn't find speedo value, volting not " in gf100_volt_oneinit()
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| D | gm20b.c | 75 nvdev_error(device, "unsupported speedo %d\n", in gm20b_volt_new()
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| /linux-6.12.1/drivers/clk/tegra/ |
| D | cvb.c | 13 /* cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) */
14 static inline int get_cvb_voltage(int speedo, int s_scale, in get_cvb_voltage() argument
19 /* apply only speedo scale: output mv = cvb_mv * v_scale */ in get_cvb_voltage()
20 mv = DIV_ROUND_CLOSEST(cvb->c2 * speedo, s_scale); in get_cvb_voltage()
21 mv = DIV_ROUND_CLOSEST((mv + cvb->c1) * speedo, s_scale) + cvb->c0; in get_cvb_voltage()
91 * @speedo_id: speedo id of the HW module
92 * @speedo_value: speedo value of the HW module
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| D | clk-tegra124-dfll-fcpu.c | 31 /* Maximum CPU frequency, indexed by CPU speedo id */
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| /linux-6.12.1/Documentation/devicetree/bindings/cpufreq/ |
| D | nvidia,tegra20-cpufreq.txt | 14 2. SoC speedo ID mask
18 2. CPU speedo ID mask
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| /linux-6.12.1/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
| D | volt.h | 30 int speedo; member
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| /linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | gm20b.c | 807 /* Forward declaration to detect speedo >=1 in gm20b_clk_init() */
850 /* speedo >= 1? */ in gm20b_clk_init()
884 /* Speedo 0 only supports 12 voltages */
1023 /* Speedo 0 GPUs cannot use noise-aware PLL */ in gm20b_clk_new()
1027 /* Speedo >= 1, use NAPLL */ in gm20b_clk_new()
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| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | nvidia,tegra-vde.yaml | 74 which is a bitfield indicating SoC speedo or process ID mask.
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| /linux-6.12.1/Documentation/devicetree/bindings/devfreq/ |
| D | nvidia,tegra30-actmon.yaml | 64 is a bitfield indicating SoC speedo ID mask.
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| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra30-emc.yaml | 50 is a bitfield indicating SoC speedo ID mask.
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| D | nvidia,tegra124-emc.yaml | 48 is a bitfield indicating SoC speedo ID mask.
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| /linux-6.12.1/Documentation/devicetree/bindings/soc/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 133 property. The supported-hw is a bitfield indicating SoC speedo or
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