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Searched +full:speed +full:- +full:bins (Results 1 – 18 of 18) sorted by relevance

/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
13 * On MSM8996 Pro the cpufreq driver shifts speed bins into the high
14 * nibble of supported hw, so speed bin 0 becomes 0x10, speed bin 1
15 * becomes 0x20, speed 2 becomes 0x40.
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
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Dmsm8996.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/interconnect/qcom,msm8996.h>
11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
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/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
28 * @mcast_bins: Multicast filtering bins
30 * this function validates the number of Multicast filtering bins specified
32 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
33 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
91 * if required, from device-tree the AXI internal register can be tuned
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Ddwmac-intel.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/clk-provider.h>
8 #include "dwmac-intel.h"
44 int func = PCI_FUNC(pdev->devfn); in stmmac_pci_find_phy_addr()
49 return -ENODEV; in stmmac_pci_find_phy_addr()
51 dmi_data = dmi_id->driver_data; in stmmac_pci_find_phy_addr()
52 func_data = dmi_data->func; in stmmac_pci_find_phy_addr()
54 for (n = 0; n < dmi_data->nfuncs; n++, func_data++) in stmmac_pci_find_phy_addr()
55 if (func_data->func == func) in stmmac_pci_find_phy_addr()
56 return func_data->phy_addr; in stmmac_pci_find_phy_addr()
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Ddwmac-loongson.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/clk-provider.h>
85 plat->bus_id = pci_dev_id(pdev); in loongson_default_data()
87 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ in loongson_default_data()
88 plat->has_gmac = 1; in loongson_default_data()
89 plat->force_sf_dma_mode = 1; in loongson_default_data()
91 /* Set default value for multicast hash bins */ in loongson_default_data()
92 plat->multicast_filter_bins = 256; in loongson_default_data()
94 plat->mac_interface = PHY_INTERFACE_MODE_NA; in loongson_default_data()
97 plat->unicast_filter_entries = 1; in loongson_default_data()
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/linux-6.12.1/include/dt-bindings/clock/
Drk3399-ddr.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
7 * DDR3 SDRAM Standard Speed Bins include tCK, tRCD, tRP, tRAS and tRC for
11 /* DDR3-800 (5-5-5) */
13 /* DDR3-800 (6-6-6) */
15 /* DDR3-1066 (6-6-6) */
17 /* DDR3-1066 (7-7-7) */
19 /* DDR3-1066 (8-8-8) */
21 /* DDR3-1333 (7-7-7) */
23 /* DDR3-1333 (8-8-8) */
25 /* DDR3-1333 (9-9-9) */
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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ddr/
Djedec,lpddr2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - elpida,ECB240ABACN
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Djedec,lpddr3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - samsung,K3QF2F20DB
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/linux-6.12.1/arch/arm/boot/dts/renesas/
Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
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/linux-6.12.1/arch/arc/boot/dts/
Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
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/linux-6.12.1/drivers/net/ethernet/qlogic/qed/
Dqed_vf.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
15 struct qed_vf_iov *p_iov = p_hwfn->vf_iov_info; in qed_vf_pf_prep()
23 mutex_lock(&(p_iov->mutex)); in qed_vf_pf_prep()
31 p_iov->offset = (u8 *)p_iov->vf2pf_request; in qed_vf_pf_prep()
33 /* Clear mailbox - both request and reply */ in qed_vf_pf_prep()
34 memset(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs)); in qed_vf_pf_prep()
35 memset(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs)); in qed_vf_pf_prep()
38 p_tlv = qed_add_tlv(p_hwfn, &p_iov->offset, type, length); in qed_vf_pf_prep()
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Dqed_vf.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2017 QLogic Corporation
45 /* general tlv header (used for both vf->pf request and pf->vf response) */
51 /* header of first vf->pf tlv carries the offset used to calculate response
60 /* header of pf->vf tlvs, carries the status of handling the request */
88 #define VFPF_ACQUIRE_CAP_PRE_FP_HSI BIT(0) /* VF pre-FP hsi version */
90 /* A requirement for supporting multi-Tx queues on a single queue-zone,
166 * mechanism [version-based] and allow a VF that can't be supported to pass
194 * non-matching versions to shed light in VF about failure.
227 /* Extended queue information - additional index for reference inside qzone.
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Dqed_sriov.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
27 return le16_to_cpu(entity_id) - MAX_NUM_PFS; in qed_vf_from_entity_id()
34 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor == in qed_vf_calculate_legacy()
38 if (!(p_vf->acquire.vfdev_info.capabilities & in qed_vf_calculate_legacy()
51 int rc = -EINVAL; in qed_sp_vf_start()
57 init_data.opaque_fid = p_vf->opaque_fid; in qed_sp_vf_start()
66 p_ramrod = &p_ent->ramrod.vf_start; in qed_sp_vf_start()
68 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID); in qed_sp_vf_start()
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/linux-6.12.1/include/linux/
Dmmzone.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/pageblock-flags.h>
20 #include <linux/page-flags-layout.h>
23 #include <linux/page-flags.h>
28 /* Free memory management - zoned buddy allocator. */
80 get_pfnblock_flags_mask(&folio->page, pfn, MIGRATETYPE_MASK))
109 #define MIGRATETYPE_MASK ((1UL << PB_migratetype_bits) - 1)
115 get_pfnblock_flags_mask(&folio->page, folio_pfn(folio), \
200 NR_KERNEL_MISC_RECLAIMABLE, /* reclaimable non-slab kernel pages */
251 * Global and per-node slab counters track slab pages. in vmstat_item_in_bytes()
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/linux-6.12.1/drivers/net/dsa/b53/
Db53_common.c4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
228 #define B53_MAX_MTU_25 (1536 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
229 #define B53_MAX_MTU (9720 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
235 b53_write8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], VTA_START_CMD | op); in b53_do_vlan_op()
240 b53_read8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], &vta); in b53_do_vlan_op()
247 return -EIO; in b53_do_vlan_op()
256 if (vlan->members) { in b53_set_vlan_entry()
257 entry = ((vlan->untag & VA_UNTAG_MASK_25) << in b53_set_vlan_entry()
258 VA_UNTAG_S_25) | vlan->members; in b53_set_vlan_entry()
259 if (dev->core_rev >= 3) in b53_set_vlan_entry()
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/linux-6.12.1/drivers/net/ethernet/mellanox/mlxsw/
Dreg.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
29 #define MLXSW_REG_LEN(type) MLXSW_REG(type)->len
30 #define MLXSW_REG_ZERO(type, payload) memset(payload, 0, MLXSW_REG(type)->len)
32 /* SGCR - Switch General Configuration Register
33 * --------------------------------------------
55 /* SPAD - Switch Physical Address Register
56 * ---------------------------------------
72 /* SSPR - Switch System Port Record Register
73 * -----------------------------------------
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/linux-6.12.1/mm/
Dvmscan.c1 // SPDX-License-Identifier: GPL-2.0
31 #include <linux/backing-dev.h>
45 #include <linux/memory-tiers.h>
189 if ((_folio)->lru.prev != _base) { \
192 prev = lru_to_folio(&(_folio->lru)); \
193 prefetchw(&prev->_field); \
210 return sc->target_mem_cgroup; in cgroup_reclaim()
219 return !sc->target_mem_cgroup || mem_cgroup_is_root(sc->target_mem_cgroup); in root_reclaim()
223 * writeback_throttling_sane - is the usual dirty throttling mechanism available?
248 if (sc->proactive && sc->proactive_swappiness) in sc_swappiness()
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