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/linux-6.12.1/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra186-display.yaml164 nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
183 nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
202 nvidia,outputs = <&sor0 &sor1>;
251 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
269 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
287 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
305 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
Dnvidia,tegra124-sor.yaml173 sor0: sor@54540000 {
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra210-pinmux.yaml90 sdmmc1, sdmmc3, shutdown, soc, sor0, sor1, spdif, spi1, spi2,
/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi1608 nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
1627 nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
1646 nvidia,outputs = <&sor0 &sor1>;
1743 sor0: sor@15540000 { label
Dtegra194.dtsi1975 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
1993 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
2011 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
2029 nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
2260 sor0: sor@15b00000 { label
Dtegra210.dtsi203 nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
218 nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
300 sor0: sor@54540000 { label
/linux-6.12.1/include/dt-bindings/clock/
Dtegra186-clock.h914 /** @brief SOR0 brick output which feeds into SOR0_CLK_SEL mux in CLK_RST_CONTROLLER_CLK_SOURCE_SOR…
/linux-6.12.1/drivers/pinctrl/tegra/
Dpinctrl-tegra210.c1241 FUNCTION(sor0),
1478 …PINGROUP(lcd_bl_pwm_pv0, DISPLAYA, PWM0, SOR0, RSVD3, 0x31fc, N, N, N, Y,…
/linux-6.12.1/drivers/clk/tegra/
Dclk-tegra210.c3060 * On Tegra210, the sor0 clock doesn't have a mux it bitfield 31:29,
3063 TEGRA_INIT_DATA_TABLE("sor0", NULL, NULL, sor0_parents,
Dclk-tegra124.c1012 TEGRA_INIT_DATA_TABLE("sor0", NULL, NULL, sor0_parents,
/linux-6.12.1/drivers/gpu/drm/tegra/
Dsor.c3853 /* fall back to the module clock on SOR0 (eDP/LVDS only) */ in tegra_sor_probe()