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/linux-6.12.1/include/linux/regulator/
Dda9121.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
/linux-6.12.1/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
32 - enum:
34 - acbel,fsg032
35 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
36 - ad,ad7414 # Deprecated, use adi,ad7414
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Ddlg,da9121.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Ward <Adam.Ward.opensource@diasemi.com>
13 Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14 Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15 Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16 Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17 Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18 Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
[all …]
Dnxp,pf8x00-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pf8x00-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jagan Teki <jagan@amarulasolutions.com>
11 - Troy Kisky <troy.kisky@boundarydevices.com>
16 linear and one vsnvs regulators. It has built-in one time programmable
22 - nxp,pf8100
23 - nxp,pf8121a
24 - nxp,pf8200
[all …]
/linux-6.12.1/drivers/regulator/
Dda9121-regulator.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
23 #include <dt-bindings/regulator/dlg,da9121-regulator.h>
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 managed regulators and simple non-configurable regulators.
64 the netlink mechanism. User-space applications can subscribe to these events
65 for real-time updates on various regulator events.
75 They provide two I2C-controlled DC/DC step-down converters with
101 tristate "Active-semi act8865 voltage regulator"
106 This driver controls a active-semi act8865 voltage output
110 tristate "Active-semi ACT8945A voltage regulator"
113 This driver controls a active-semi ACT8945A voltage regulator
114 via I2C bus. The ACT8945A features three step-down DC/DC converters
[all …]
Dda9121-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // DA9121 Single-channel dual-phase 10A buck converter
7 // DA9130 Single-channel dual-phase 10A buck converter (Automotive)
8 // DA9217 Single-channel dual-phase 6A buck converter
9 // DA9122 Dual-channel single-phase 5A buck converter
10 // DA9131 Dual-channel single-phase 5A buck converter (Automotive)
11 // DA9220 Dual-channel single-phase 3A buck converter
12 // DA9132 Dual-channel single-phase 3A buck converter (Automotive)
29 #include "da9121-regulator.h"
135 int buck_id; /* 0=core, 1/2-buck */
[all …]
/linux-6.12.1/Documentation/driver-api/
Ddpll.rst1 .. SPDX-License-Identifier: GPL-2.0
10 PLL - Phase Locked Loop is an electronic circuit which syntonizes clock
14 DPLL - Digital Phase Locked Loop is an integrated circuit which in
15 addition to plain PLL behavior incorporates a digital phase detector
32 Single dpll device object means single Digital PLL circuit and bunch of
44 attributes that result in single device match.
53 provided for a single dpll device.
63 request, where user provides attributes that result in single pin match.
82 - ``DPLL_PIN_STATE_CONNECTED`` - the pin is used to drive dpll device
83 - ``DPLL_PIN_STATE_DISCONNECTED`` - the pin is not used to drive dpll
[all …]
/linux-6.12.1/lib/zstd/compress/
Dzstd_cwksp.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
14 /*-*************************************
20 /*-*************************************
39 /*-*************************************
51 * expect a well-formed caller to free this.
59 * Zstd fits all its internal datastructures into a single continuous buffer,
60 * so that it only needs to perform a single OS allocation (or so that a buffer
67 * - These different internal datastructures have different setup requirements:
69 * - The static objects need to be cleared once and can then be trivially
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/linux-6.12.1/Documentation/netlink/specs/
Ddpll.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
8 -
16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
41 -
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/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Dsamsung,exynos-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Jaehoon Chung <jh80.chung@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - enum:
19 - axis,artpec8-dw-mshc
20 - samsung,exynos4210-dw-mshc
21 - samsung,exynos4412-dw-mshc
[all …]
/linux-6.12.1/drivers/hwmon/pmbus/
Dpli1209bc.c1 // SPDX-License-Identifier: GPL-2.0+
26 int phase, int reg) in pli1209bc_read_word_data() argument
33 data = pmbus_read_word_data(client, page, phase, reg); in pli1209bc_read_word_data()
37 return clamp_val(data, -32768, 32767) & 0xffff; in pli1209bc_read_word_data()
45 data = pmbus_read_word_data(client, page, phase, in pli1209bc_read_word_data()
51 return pmbus_read_word_data(client, page, phase, reg); in pli1209bc_read_word_data()
53 return -ENODATA; in pli1209bc_read_word_data()
97 * The pli1209 digital supervisor only contains a single BCM, making
115 client->dev.platform_data = &pli1209bc_plat_data; in pli1209bc_probe()
Ducd9200.c1 // SPDX-License-Identifier: GPL-2.0-or-later
82 if (!i2c_check_functionality(client->adapter, in ucd9200_probe()
85 return -ENODEV; in ucd9200_probe()
90 dev_err(&client->dev, "Failed to read device ID\n"); in ucd9200_probe()
94 dev_info(&client->dev, "Device ID %s\n", block_buffer); in ucd9200_probe()
96 for (mid = ucd9200_id; mid->name[0]; mid++) { in ucd9200_probe()
97 if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) in ucd9200_probe()
100 if (!mid->name[0]) { in ucd9200_probe()
101 dev_err(&client->dev, "Unsupported device\n"); in ucd9200_probe()
102 return -ENODEV; in ucd9200_probe()
[all …]
/linux-6.12.1/drivers/base/power/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/common.c - Common device power management code.
18 * dev_pm_get_subsys_data - Create or refcount power.subsys_data for device.
31 return -ENOMEM; in dev_pm_get_subsys_data()
33 spin_lock_irq(&dev->power.lock); in dev_pm_get_subsys_data()
35 if (dev->power.subsys_data) { in dev_pm_get_subsys_data()
36 dev->power.subsys_data->refcount++; in dev_pm_get_subsys_data()
38 spin_lock_init(&psd->lock); in dev_pm_get_subsys_data()
39 psd->refcount = 1; in dev_pm_get_subsys_data()
40 dev->power.subsys_data = psd; in dev_pm_get_subsys_data()
[all …]
/linux-6.12.1/drivers/net/dsa/sja1105/
Dsja1105.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
25 * to get a "phase" and get 1 decimal point precision.
29 #define SJA1105_RGMII_DELAY_PHASE_TO_PS(phase) \ argument
30 ((800 * (phase)) / 360)
31 #define SJA1105_RGMII_DELAY_PHASE_TO_HW(phase) \ argument
32 (((phase) - 738) / 9)
124 * 64-bit values back.
271 /* PTP two-step TX timestamp ID, and its serialization lock */
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/selftests/
Di915_syncmap.c41 for (d = 0; d < depth - 1; d++) { in __sync_print()
42 if (last & BIT(depth - d - 1)) in __sync_print()
47 *sz -= len; in __sync_print()
49 len = scnprintf(buf, *sz, "%x-> ", idx); in __sync_print()
51 *sz -= len; in __sync_print()
55 len = scnprintf(buf, *sz, "0x%016llx", p->prefix << p->height << SHIFT); in __sync_print()
57 *sz -= len; in __sync_print()
58 X = (p->height + SHIFT) / 4; in __sync_print()
59 scnprintf(buf - X, *sz + X, "%*s", X, "XXXXXXXXXXXXXXXXX"); in __sync_print()
61 if (!p->height) { in __sync_print()
[all …]
/linux-6.12.1/sound/firewire/bebob/
Dbebob_yamaha_terratec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * bebob_yamaha.c - a part of driver for BeBoB based devices
5 * Copyright (c) 2013-2014 Takashi Sakamoto
12 * Yamaha GO44 is not designed to be used as stand-alone mixer. So any streams
16 * way to recover this state. GO46 is better for stand-alone mixer.
19 * At 192.0kHz, the device reports 4 PCM-in, 1 MIDI-in, 6 PCM-out, 1 MIDI-out.
20 * But Yamaha's driver reduce 2 PCM-in, 1 MIDI-in, 2 PCM-out, 1 MIDI-out to use
21 * 'Extended Stream Format Information Command - Single Request' in 'Additional
25 * Unfortunately current 'ffado-mixer' generated many asynchronous transaction
27 * recommend users to close ffado-mixer at 192.0kHz if mixer is needless.
[all …]
/linux-6.12.1/Documentation/bpf/libbpf/
Dlibbpf_overview.rst1 .. SPDX-License-Identifier: GPL-2.0
7 libbpf is a C-based library containing a BPF loader that takes compiled BPF
13 The following are the high-level features supported by libbpf:
15 * Provides high-level and low-level APIs for user space programs to interact
16 with BPF programs. The low-level APIs wrap all the bpf system call
17 functionality, which is useful when users need more fine-grained control
22 * Provides BPF-side APIS, including BPF helper definitions, BPF maps support,
24 * Supports BPF CO-RE mechanism, enabling BPF developers to write portable
42 The following section provides a brief overview of each phase in the BPF life
45 * **Open phase**: In this phase, libbpf parses the BPF
[all …]
/linux-6.12.1/drivers/iio/proximity/
Dsx_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
63 * Each phase presented by the sensor is an IIO channel..
67 * @stat_offset: Offset to check phase status.
156 /* 3 is the number of events defined by a single phase. */
/linux-6.12.1/tools/power/pm-graph/
Dsleepgraph.83 sleepgraph \- Suspend/Resume timing analysis
21 Generates output files in subdirectory: suspend-yymmdd-HHMMSS
27 \fB-h\fR
30 \fB-v\fR
33 \fB-verbose\fR
36 \fB-config \fIfile\fR
39 \fB-m \fImode\fR
42 \fB-o \fIname\fR
46 e.g. suspend-{hostname}-{date}-{time}
48 \fB-rtcwake \fIt\fR | off
[all …]
/linux-6.12.1/Documentation/networking/
Dcan.rst2 SocketCAN - Controller Area Network
20 .. _socketcan-motivation:
29 functionality. Usually, there is only a hardware-specific device
32 Queueing of frames and higher-level transport protocols like ISO-TP
34 character-device implementations support only one single process to
47 protocol family module and also vice-versa. Also, the protocol family
57 communicate using a specific transport protocol, e.g. ISO-TP, just
60 CAN-IDs, frames, etc.
62 Similar functionality visible from user-space could be provided by a
74 * **Abstraction:** In most existing character-device implementations, the
[all …]
/linux-6.12.1/Documentation/hwmon/
Dpmbus-core.rst9 power-management protocol with a fully defined command language that facilitates
11 protocol is implemented over the industry-standard SMBus serial interface and
12 enables programming, control, and real-time monitoring of compliant power
18 promoted by the PMBus Implementers Forum (PMBus-IF), comprising 30+ adopters
22 commands, and manufacturers can add as many non-standard commands as they like.
23 Also, different PMBUs devices act differently if non-supported commands are
43 PMBus device capabilities auto-detection
46 For generic PMBus devices, code in pmbus.c attempts to auto-detect all supported
47 PMBus commands. Auto-detection is somewhat limited, since there are simply too
50 pages (see the PMBus specification for details on multi-page PMBus devices).
[all …]
Dltc2978.rst10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
42 Addresses scanned: -
52 Addresses scanned: -
60 Addresses scanned: -
68 Addresses scanned: -
76 Addresses scanned: -
84 Addresses scanned: -
[all …]
/linux-6.12.1/include/linux/iio/frequency/
Dad9523.h1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct ad9523_channel_spec - Output channel configuration
42 * @sync_ignore_en: Ignore chip-level SYNC signal.
47 * @divider_phase: Divider initial phase after a SYNC. Range 0..63
49 * @channel_divider: 10-bit channel divider.
106 * struct ad9523_platform_data - platform specific information
109 * @refa_diff_rcv_en: REFA differential/single-ended input selection.
110 * @refb_diff_rcv_en: REFB differential/single-ended input selection.
111 * @zd_in_diff_en: Zero Delay differential/single-ended input selection.
112 * @osc_in_diff_en: OSC differential/ single-ended input selection.
[all …]
/linux-6.12.1/drivers/mmc/host/
Ddw_mmc-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/slot-gpio.h>
16 #include "dw_mmc-pltfm.h"
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
46 unsigned long rate = clk_get_rate(host->ciu_clk); in rockchip_mmc_get_internal_phase()
51 /* Constant signal, no measurable phase shift */ in rockchip_mmc_get_internal_phase()
78 struct dw_mci_rockchip_priv_data *priv = host->priv; in rockchip_mmc_get_phase()
79 struct clk *clock = sample ? priv->sample_clk : priv->drv_clk; in rockchip_mmc_get_phase()
81 if (priv->internal_phase) in rockchip_mmc_get_phase()
89 unsigned long rate = clk_get_rate(host->ciu_clk); in rockchip_mmc_set_internal_phase()
[all …]

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