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/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Dsdhci.txt7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
9 is on in the mask then the bit is incorrect in the register and should be
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
Dsdhci-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SDHCI Controller Common Properties
10 - Adrian Hunter <adrian.hunter@intel.com>
13 Common properties present on Secure Digital Host Controller Interface (SDHCI)
17 sdhci-caps:
20 Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES
23 sdhci-caps-mask:
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Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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/linux-6.12.1/drivers/mmc/host/
Dsdhci-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's
16 #include "sdhci-cqhci.h"
17 #include "sdhci-pltfm.h"
69 if (!(priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK)) in enable_clock_gating()
77 static void brcmstb_reset(struct sdhci_host *host, u8 mask) in brcmstb_reset() argument
79 sdhci_and_cqhci_reset(host, mask); in brcmstb_reset()
81 /* Reset will clear this, so re-enable it */ in brcmstb_reset()
85 static void brcmstb_sdhci_reset_cmd_data(struct sdhci_host *host, u8 mask) in brcmstb_sdhci_reset_cmd_data() argument
87 u32 new_mask = (mask & (SDHCI_RESET_CMD | SDHCI_RESET_DATA)) << 24; in brcmstb_sdhci_reset_cmd_data()
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Dsdhci-iproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * iProc SDHCI platform driver
14 #include "sdhci-pltfm.h"
18 u32 caps; member
36 u32 val = readl(host->ioaddr + reg); in sdhci_iproc_readl()
39 mmc_hostname(host->mmc), reg, val); in sdhci_iproc_readl()
50 if ((reg == SDHCI_TRANSFER_MODE) && iproc_host->is_cmd_shadowed) { in sdhci_iproc_readw()
52 val = iproc_host->shadow_cmd; in sdhci_iproc_readw()
54 iproc_host->is_blk_shadowed) { in sdhci_iproc_readw()
56 val = iproc_host->shadow_blk; in sdhci_iproc_readw()
[all …]
Dsdhci-omap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SDHCI Controller driver for TI's OMAP SoCs
11 #include <linux/mmc/slot-gpio.h>
23 #include "sdhci-pltfm.h"
97 /* sdhci-omap controller flags */
103 u32 offset; /* Offset for SDHCI regs from base */
142 return readl(host->base + host->omap_offset + offset); in sdhci_omap_readl()
148 writel(data, host->base + host->omap_offset + offset); in sdhci_omap_writel()
155 struct device *dev = omap_host->dev; in sdhci_omap_set_pbias()
157 if (IS_ERR(omap_host->pbias)) in sdhci_omap_set_pbias()
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Dsdhci-pxav3.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #include "sdhci.h"
28 #include "sdhci-pltfm.h"
80 dev_err(&pdev->dev, "no mbus dram info\n"); in mv_conf_mbus_windows()
81 return -EINVAL; in mv_conf_mbus_windows()
86 dev_err(&pdev->dev, "cannot get mbus registers\n"); in mv_conf_mbus_windows()
87 return -EINVAL; in mv_conf_mbus_windows()
90 regs = ioremap(res->start, resource_size(res)); in mv_conf_mbus_windows()
92 dev_err(&pdev->dev, "cannot map mbus registers\n"); in mv_conf_mbus_windows()
93 return -ENOMEM; in mv_conf_mbus_windows()
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Dsdhci_am654.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
88 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1
108 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
109 "ti,itap-del-sel-legacy",
111 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
112 "ti,itap-del-sel-mmc-hs",
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Dsdhci-pxav2.c1 // SPDX-License-Identifier: GPL-2.0-only
26 #include "sdhci.h"
27 #include "sdhci-pltfm.h"
53 static void pxav2_reset(struct sdhci_host *host, u8 mask) in pxav2_reset() argument
55 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); in pxav2_reset()
56 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; in pxav2_reset()
58 sdhci_reset(host, mask); in pxav2_reset()
60 if (mask == SDHCI_RESET_ALL) { in pxav2_reset()
67 if (pdata && pdata->clk_delay_sel == 1) { in pxav2_reset()
68 tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav2_reset()
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Dsdhci-of-at91.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mmc/slot-gpio.h>
24 #include "sdhci-pltfm.h"
57 mc1r = readb(host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
59 writeb(mc1r, host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
66 host->mmc->actual_clock = 0; in sdhci_at91_set_clock()
71 * internal clock, changing the configuration and re-enabling the in sdhci_at91_set_clock()
83 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_at91_set_clock()
92 mmc_hostname(host->mmc)); in sdhci_at91_set_clock()
113 static void sdhci_at91_reset(struct sdhci_host *host, u8 mask) in sdhci_at91_reset() argument
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Dsdhci-esdhc-mcf.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/platform_data/mmc-esdhc-mcf.h>
13 #include "sdhci-pltfm.h"
14 #include "sdhci-esdhc.h"
47 u32 mask, u32 val, int reg) in esdhc_clrset_be() argument
49 void __iomem *base = host->ioaddr + (reg & ~3); in esdhc_clrset_be()
52 mask <<= shift; in esdhc_clrset_be()
58 writel((readl(base) & ~mask) | val, base); in esdhc_clrset_be()
62 * Note: mcf is big-endian, single bytes need to be accessed at big endian
67 void __iomem *base = host->ioaddr + (reg & ~3); in esdhc_mcf_writeb_be()
[all …]
Dsdhci-xenon.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
22 #include <linux/dma-mapping.h>
24 #include "sdhci-pltfm.h"
25 #include "sdhci-xenon.h"
44 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
45 return -ETIMEDOUT; in xenon_enable_internal_clk()
53 /* Set SDCLK-off-while-idle */
58 u32 mask; in xenon_set_sdclk_off_idle() local
62 mask = (0x1 << (XENON_SDCLK_IDLEOFF_ENABLE_SHIFT + sdhc_id)); in xenon_set_sdclk_off_idle()
[all …]
Dsdhci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
35 #include "sdhci.h"
37 #define DRIVER_NAME "sdhci"
40 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
43 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
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Dsdhci-acpi.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/pinctrl/pinconf-generic.h>
17 #include <linux/dma-mapping.h>
32 #include <linux/mmc/slot-gpio.h>
39 #include "sdhci.h"
51 unsigned long caps; member
60 unsigned long caps; member
90 return (void *)c->private; in sdhci_acpi_priv()
95 return c->slot && (c->slot->flags & flag); in sdhci_acpi_flag()
127 return -EOPNOTSUPP; in __intel_dsm()
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Dsdhci-pci-arasan.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci-pci-arasan.c - Driver for Arasan PCI Controller with
14 #include "sdhci.h"
15 #include "sdhci-pci.h"
93 static int arasan_phy_addr_poll(struct sdhci_host *host, u32 offset, u32 mask) in arasan_phy_addr_poll() argument
102 if (!(val & mask)) in arasan_phy_addr_poll()
105 return -EBUSY; in arasan_phy_addr_poll()
129 static int arasan_phy_sts_poll(struct sdhci_host *host, u32 offset, u32 mask) in arasan_phy_sts_poll() argument
140 return -EBUSY; in arasan_phy_sts_poll()
141 else if (val & mask) in arasan_phy_sts_poll()
[all …]
Dsdhci-pci-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
8 * - JMicron (hardware and technical support)
17 #include <linux/dma-mapping.h>
32 #include <linux/mmc/slot-gpio.h>
40 #include "sdhci.h"
41 #include "sdhci-cqhci.h"
42 #include "sdhci-pci.h"
53 for (i = 0; i < chip->num_slots; i++) { in sdhci_pci_init_wakeup()
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Dsdhci-of-arasan.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
26 #include <linux/firmware/xlnx-zynqmp.h>
29 #include "sdhci-cqhci.h"
30 #include "sdhci-pltfm.h"
92 * On some SoCs the syscon area has a feature where the upper 16-bits of
93 * each 32-bit register act as a write mask for the lower 16-bits. This allows
97 #define HIWORD_UPDATE(val, mask, shift) \ argument
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Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
20 #include <linux/mmc/slot-gpio.h>
32 #include "sdhci-cqhci.h"
33 #include "sdhci-pltfm.h"
192 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
194 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
200 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
213 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()
216 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew()
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Dsdhci_f_sdh30.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
20 #include "sdhci-pltfm.h"
55 if (priv->vendor_hs200) { in sdhci_f_sdh30_soft_voltage_switch()
56 dev_info(priv->dev, "%s: setting hs200\n", __func__); in sdhci_f_sdh30_soft_voltage_switch()
58 ctrl |= priv->vendor_hs200; in sdhci_f_sdh30_soft_voltage_switch()
72 static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask) in sdhci_f_sdh30_reset() argument
80 sdhci_reset(host, mask); in sdhci_f_sdh30_reset()
82 if (priv->enable_cmd_dat_delay) { in sdhci_f_sdh30_reset()
88 if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) && in sdhci_f_sdh30_reset()
[all …]
Dsdhci-of-dwcmshc.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/arm-smccc.h>
14 #include <linux/dma-mapping.h>
24 #include "sdhci-pltfm.h"
41 /* Tuning and auto-tuning fields in AT_CTRL_R control register */
51 #define AT_CTRL_PRE_CHANGE_DLY 0x1 /* 2-cycle latency */
53 #define AT_CTRL_POST_CHANGE_DLY 0x3 /* 4-cycle latency */
151 #define PHY_PAD_TXSLEW_CTRL_P 0x3 /* Slew control for P-Type pad TX */
153 #define PHY_PAD_TXSLEW_CTRL_N 0x3 /* Slew control for N-Type pad TX */
154 #define PHY_PAD_TXSLEW_CTRL_N_SG2042 0x2 /* Slew control for N-Type pad TX for SG2042 */
[all …]
/linux-6.12.1/arch/arm/boot/dts/aspeed/
Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
41 compatible = "shared-dma-pool";
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/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91-sama7g54_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g54_curiosity.dts - Device Tree file for SAMA7G54 Curiosity Board
10 /dts-v1/;
11 #include "sama7g5-pinfunc.h"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
16 #include <dt-bindings/pinctrl/at91.h>
20 compatible = "microchip,sama7g54-curiosity", "microchip,sama7g5", "microchip,sama7";
28 stdout-path = "serial0:115200n8";
[all …]
Dat91-sama7g5ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
11 /dts-v1/;
12 #include "sama7g5-pinfunc.h"
14 #include <dt-bindings/mfd/atmel-flexcom.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/pinctrl/at91.h>
17 #include <dt-bindings/sound/microchip,pdmc.h>
20 model = "Microchip SAMA7G5-EK";
25 stdout-path = "serial0:115200n8";
[all …]
/linux-6.12.1/drivers/mmc/core/
Dhost.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2007-2008 Pierre Ossman
24 #include <linux/mmc/slot-gpio.h>
29 #include "slot-gpio.h"
46 if (!host->bus_ops) in mmc_host_class_prepare()
50 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare()
51 return host->bus_ops->pre_suspend(host); in mmc_host_class_prepare()
76 wakeup_source_unregister(host->ws); in mmc_host_classdev_release()
77 if (of_alias_get_id(host->parent->of_node, "mmc") < 0) in mmc_host_classdev_release()
78 ida_free(&mmc_host_ida, host->index); in mmc_host_classdev_release()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mm-nitrogen-r2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
13 reg_vref_1v8: regulator-vref-1v8 {
14 compatible = "regulator-fixed";
15 regulator-name = "vref-1v8";
16 regulator-min-microvolt = <1800000>;
17 regulator-max-microvolt = <1800000>;
20 reg_vref_3v3: regulator-vref-3v3 {
21 compatible = "regulator-fixed";
[all …]

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