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/linux-6.12.1/arch/arm64/boot/dts/renesas/
Drzg2ul-smarc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
8 #include <dt-bindings/gpio/gpio.h>
9 #include "rzg2ul-smarc-pinfunction.dtsi"
10 #include "rz-smarc-common.dtsi"
14 /delete-property/ pinctrl-0;
15 /delete-property/ pinctrl-names;
21 sound-dai = <&ssi1>;
25 clock-frequency = <400000>;
30 gpio-controller;
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Drzg2ul-smarc-pinfunction.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default";
21 can0-stb-hog {
22 gpio-hog;
24 output-low;
25 line-name = "can0_stb";
35 can1-stb-hog {
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Drzg2lc-smarc-pinfunction.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default";
16 /* SW8 should be at position 2->1 */
24 /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
25 can1-stb-hog {
26 gpio-hog;
28 output-low;
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Drzg2l-smarc-pinfunction.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default";
20 /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
21 can0-stb-hog {
22 gpio-hog;
24 output-low;
25 line-name = "can0_stb";
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Dr9a09g057h44-rzv2h-evk.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
11 #include <dt-bindings/gpio/gpio.h>
16 compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
32 stdout-path = "serial0:115200n8";
47 compatible = "regulator-fixed";
49 regulator-name = "fixed-3.3V";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Drenesas,rzg2l-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
24 - items:
25 - enum:
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
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/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Ddlg,da9063.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steve Twiss <stwiss.opensource@diasemi.com>
13 For device-tree bindings of other sub-modules refer to the binding documents
14 under the respective sub-system directories.
15 Using regulator-{uv,ov}-{warn,error,protection}-microvolt requires special
21 - https://www.dialog-semiconductor.com/products/da9063l
22 - https://www.dialog-semiconductor.com/products/da9063
23 - https://www.dialog-semiconductor.com/products/da9062
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/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-path = "serial0:115200n8";
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
35 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
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