Searched +full:sd +full:- +full:sgpio (Results 1 – 6 of 6) sorted by relevance
| /linux-6.12.1/arch/arm64/boot/dts/microchip/ |
| D | sparx5_pcb134_board.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
16 i2c0_imux: i2c-mux-0 {
17 compatible = "i2c-mux-pinctrl";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 i2c-parent = <&i2c0>;
23 i2c0_emux: i2c-mux-1 {
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| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | microchip,sparx5-switch.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | lpc1850-cgu.txt | 15 - Above text taken from NXP LPC1850 User Manual.
19 Documentation/devicetree/bindings/clock/clock-bindings.txt
22 - compatible:
23 Should be "nxp,lpc1850-cgu"
24 - reg:
27 - #clock-cells:
28 Shall have value <1>. The permitted clock-specifier values
30 - clocks:
34 - clock-indices:
37 - clock-output-names:
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| /linux-6.12.1/arch/arm/boot/dts/aspeed/ |
| D | aspeed-g5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
52 compatible = "simple-bus";
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| /linux-6.12.1/drivers/net/ethernet/microchip/sparx5/ |
| D | sparx5_main.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * https://github.com/microchip-ung/sparx-5_reginfo
33 ((SPX5_BUFFER_MEMORY / SPX5_BUFFER_CELL_SZ - 100) * (fraction) / 100)
228 if (idx == iomap->range) { in sparx5_create_targets()
234 iores[idx] = platform_get_resource(sparx5->pdev, IORESOURCE_MEM, in sparx5_create_targets()
237 dev_err(sparx5->dev, "Invalid resource\n"); in sparx5_create_targets()
238 return -EINVAL; in sparx5_create_targets()
240 iomem[idx] = devm_ioremap(sparx5->dev, in sparx5_create_targets()
241 iores[idx]->start, in sparx5_create_targets()
244 dev_err(sparx5->dev, "Unable to get switch registers: %s\n", in sparx5_create_targets()
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| /linux-6.12.1/ |
| D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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