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/linux-6.12.1/Documentation/devicetree/bindings/soc/ti/
Dsci-pm-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI generic power domain
10 - Nishanth Menon <nm@ti.com>
13 - $ref: /schemas/power/power-domain.yaml#
20 through a protocol called TI System Control Interface (TI-SCI protocol).
22 This PM domain node represents the global PM domain managed by the TI-SCI
23 controller. Since this relies on the TI SCI protocol to communicate with
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Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
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/linux-6.12.1/Documentation/devicetree/bindings/arm/keystone/
Dti,sci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/keystone/ti,sci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI controller
10 - Nishanth Menon <nm@ti.com>
23 See https://software-dl.ti.com/tisci/esd/latest/index.html for protocol definition.
25 The TI-SCI node describes the Texas Instrument's System Controller entity node.
27 specific functionality such as clocks, power domain, reset or additional
29 relationship between the TI-SCI parent node to the child node.
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/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am65-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,am654-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
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Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J7200 SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
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Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J721E SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
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Dk3-j784s4-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J784S4 SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 bootph-all;
11 compatible = "ti,k2g-sci";
12 ti,host-id = <12>;
14 mbox-names = "rx", "tx";
19 reg-names = "debug_messages";
22 k3_pds: power-controller {
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Dk3-j721s2-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J721S2 SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
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Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM62A SoC Family Main Domain peripherals
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
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Dk3-am62p-j722s-common-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree file for the MAIN domain peripherals shared by AM62P and J722S
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 gic500: interrupt-controller@1800000 {
16 compatible = "arm,gic-v3";
17 #address-cells = <2>;
18 #size-cells = <2>;
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Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM625 SoC Family Main Domain peripherals
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
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Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM642 SoC Family Main Domain peripherals
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
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/linux-6.12.1/drivers/pmdomain/ti/
Dti_sci_pm_domains.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI SCI Generic Power Domain Driver
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
6 * J Keerthy <j-keerthy@ti.com>
7 * Dave Gerlach <d-gerlach@ti.com>
17 #include <dt-bindings/soc/ti,sci_pm_domain.h>
20 * struct ti_sci_genpd_provider: holds common TI SCI genpd provider data
21 * @ti_sci: handle to TI SCI protocol driver that provides ops to
35 * struct ti_sci_pm_domain: TI specific data needed for power domain
42 * @parent: link to the parent TI SCI genpd provider
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 tristate "TI SCI PM Domains Driver"
15 Generic power domain implementation for TI device implementing
16 the TI SCI protocol.
/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Di2c-davinci.txt7 - compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8 - reg : Offset and length of the register set for the device
9 - clocks: I2C functional clock phandle.
11 Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
13 SoC-specific Required Properties:
17 - power-domains: Should contain a phandle to a PM domain provider node
20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
23 - interrupts : standard interrupt property.
24 - clock-frequency : desired I2C bus clock frequency in Hz.
25 - ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC
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/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dti,keystone-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Roger Quadros <rogerq@kernel.org>
15 - enum:
16 - ti,keystone-dwc3
17 - ti,am654-dwc3
22 '#address-cells':
25 '#size-cells':
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Dti,am62-usb.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
10 - Aswath Govindraju <a-govindraju@ti.com>
14 const: ti,am62-usb
19 - description: USB CFG register space
20 - description: USB PHY2 register space
24 power-domains:
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Dti,j721e-usb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI wrapper module for the Cadence USBSS-DRD controller
10 - Roger Quadros <rogerq@kernel.org>
15 - const: ti,j721e-usb
16 - items:
17 - const: ti,am64-usb
18 - const: ti,j721e-usb
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/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Dti-omap-hsmmc.txt10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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/linux-6.12.1/Documentation/devicetree/bindings/dma/
Dti-edma.txt8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dti,keystone-rproc.txt5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
31 - reg: Should contain an entry for each value in 'reg-names'.
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Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
27 Each Dual-Core R5F sub-system is represented as a single DTS node
40 - ti,am62-r5fss
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/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dspi-davinci.txt4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
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/linux-6.12.1/drivers/pmdomain/imx/
Dscu-pd.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
10 * single global power domain and implement the ->attach|detach_dev()
12 * From within the ->attach_dev(), we could get the OF node for
13 * the device that is being attached and then parse the power-domain
18 * Additionally, we need to implement the ->stop() and ->start()
20 * rather than using the above ->power_on|off() callbacks.
23 * 1. The ->attach_dev() of power domain infrastructure still does
27 * real sub power domain of device should be attached.
30 * domain cases.
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/linux-6.12.1/arch/arm/boot/dts/ti/keystone/
Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
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