| /linux-6.12.1/drivers/iommu/intel/ |
| D | pasid.h | 127 * Setup the DID(Domain Identifier) field (Bit 64~79) of scalable mode
137 * Get domain ID value of a scalable mode PASID entry.
147 * of a scalable mode PASID entry.
156 * Setup the AW(Address Width) field (Bit 2~4) of a scalable mode PASID
167 * of a scalable mode PASID entry.
177 * Disable) field (Bit 1) of a scalable mode PASID entry.
186 * Access Dirty Enable) field (Bit 9) of a scalable mode PASID
196 * Access Dirty Enable) field (Bit 9) of a scalable mode PASID
206 * Access Dirty Enable) field (Bit 9) of a scalable mode PASID
216 * scalable mode PASID entry.
[all …]
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| D | Kconfig | 77 bool "Enable Intel IOMMU scalable mode by default"
80 Selecting this option will enable by default the scalable mode if
81 hardware presents the capability. The scalable mode is defined in
82 VT-d 3.0. The scalable mode capability could be checked by reading
84 is not selected, scalable mode support could also be enabled by
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| D | debugfs.c | 227 * Scalable mode root entry points to upper scalable mode in ctx_tbl_walk()
228 * context table and lower scalable mode context table. Each in ctx_tbl_walk()
229 * scalable mode context table has 128 context entries where as in ctx_tbl_walk()
231 * scalable mode, the context entries for former 128 devices are in ctx_tbl_walk()
232 * in the lower scalable mode context table, while the latter in ctx_tbl_walk()
233 * 128 devices are in the upper scalable mode context table. in ctx_tbl_walk()
234 * In scalable mode, when devfn > 127, iommu_context_addr() in ctx_tbl_walk()
235 * automatically refers to upper scalable mode context table and in ctx_tbl_walk()
237 * between scalable mode and non scalable mode. in ctx_tbl_walk()
351 bool scalable, found = false; in domain_translation_struct_show() local
[all …]
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| D | pasid.c | 95 /* Free scalable mode PASID directory tables: */ in intel_pasid_free_table()
290 * Set up the scalable mode pasid table entry for first only
368 * Set up the scalable mode pasid entry for second only translation type.
500 * Set up the scalable mode pasid entry for passthrough translation type.
671 * Interfaces to setup or teardown a pasid table to the scalable-mode
719 * Get the PASID directory size for scalable mode context entry.
720 * Value of X in the PDTS field of a scalable mode context entry
879 * IOMMU is in scalable mode and all PASID table entries of the device were
893 * when operating in scalable mode. Therefore the @did value doesn't in intel_context_flush_present()
894 * matter in scalable mode. in intel_context_flush_present()
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| /linux-6.12.1/net/ipv4/ |
| D | tcp_scalable.c | 2 /* Tom Kelly's Scalable TCP
4 * See http://www.deneholme.net/tom/scalable/
47 .name = "scalable",
65 MODULE_DESCRIPTION("Scalable TCP");
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| /linux-6.12.1/tools/perf/pmu-events/arch/arm64/ |
| D | common-and-microarch.json | 741 "PublicDescription": "Scalable floating-point element Operations speculatively executed.",
744 "BriefDescription": "Scalable floating-point element Operations speculatively executed."
747 … "PublicDescription": "Non-scalable floating-point element Operations speculatively executed.",
750 "BriefDescription": "Non-scalable floating-point element Operations speculatively executed."
753 …"PublicDescription": "Scalable half-precision floating-point element Operations speculatively exec…
756 …"BriefDescription": "Scalable half-precision floating-point element Operations speculatively execu…
759 …"PublicDescription": "Non-scalable half-precision floating-point element Operations speculatively …
762 …"BriefDescription": "Non-scalable half-precision floating-point element Operations speculatively e…
765 …"PublicDescription": "Scalable single-precision floating-point element Operations speculatively ex…
768 …"BriefDescription": "Scalable single-precision floating-point element Operations speculatively exe…
[all …]
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| /linux-6.12.1/arch/arm/mach-omap2/ |
| D | voltagedomains54xx_data.c | 35 .scalable = true,
46 .scalable = true,
57 .scalable = true,
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| D | voltagedomains44xx_data.c | 49 .scalable = true,
60 .scalable = true,
71 .scalable = true,
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| D | voltage.h | 49 * @scalable: Whether or not this voltage domain is scalable
64 bool scalable; member
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| D | voltagedomains3xxx_data.c | 50 .scalable = true,
61 .scalable = true,
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| /linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/ |
| D | fp_operation.json | 4 …"PublicDescription": "Counts speculatively executed scalable single precision floating point opera…
8 …"PublicDescription": "Counts speculatively executed non-scalable single precision floating point o…
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| /linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
| D | fp_operation.json | 16 …"PublicDescription": "Counts speculatively executed scalable single precision floating point opera…
20 …"PublicDescription": "Counts speculatively executed non-scalable single precision floating point o…
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| /linux-6.12.1/drivers/net/can/mscan/ |
| D | Kconfig | 6 The Motorola Scalable Controller Area Network (MSCAN) definition
8 implementation of the Motorola Scalable CAN concept targeted for
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| /linux-6.12.1/kernel/trace/ |
| D | trace_clock.c | 11 * - medium: scalable global clock with some jitter
37 * sched_clock() is an architecture implemented, fast, scalable, in trace_clock_local()
54 * jitter between CPUs. So it's a pretty scalable clock, but there
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| /linux-6.12.1/Documentation/ABI/testing/ |
| D | debugfs-intel-iommu | 227 in legacy mode or scalable mode.
234 For a device that supports scalable mode, dump the
261 supports scalable mode.
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| /linux-6.12.1/Documentation/filesystems/ |
| D | ceph.rst | 34 system extremely efficient and scalable.
37 in-memory cache above the file namespace that is extremely scalable,
46 independent metadata servers, allowing scalable concurrent access.
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| /linux-6.12.1/include/linux/ |
| D | trace_clock.h | 10 * - medium: scalable global clock with some jitter
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| D | sbitmap.h | 3 * Fast and scalable bitmaps.
47 * struct sbitmap - Scalable bitmap.
101 * struct sbitmap_queue - Scalable bitmap with the added ability to wait on free
111 * @sb: Scalable bitmap.
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| /linux-6.12.1/Documentation/arch/arm64/ |
| D | sve.rst | 2 Scalable Vector Extension support for AArch64 Linux
10 order to support use of the ARM Scalable Vector Extension (SVE), including
11 interactions with Streaming SVE mode added by the Scalable Matrix Extension
77 * Whenever SVE scalable register values (Zn, Pn, FFR) are exchanged in memory
157 * Each scalable register (Zn, Pn, FFR) is stored in an endianness-invariant
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| D | booting.rst | 304 For CPUs with the Scalable Vector Extension (FEAT_SVE) present:
322 For CPUs with the Scalable Matrix Extension (FEAT_SME):
352 For CPUs with the Scalable Matrix Extension FA64 feature (FEAT_SME_FA64):
372 For CPUs with the Scalable Matrix Extension version 2 (FEAT_SME2):
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | mstar,msc313-cpupll.yaml | 13 The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable
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| /linux-6.12.1/fs/ceph/ |
| D | Kconfig | 15 scalable file system designed to provide high performance,
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| /linux-6.12.1/Documentation/mm/ |
| D | numa.rst | 38 lives interesting. Rather, this architecture is a means to provide scalable
39 memory bandwidth. However, to achieve scalable memory bandwidth, system and
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| /linux-6.12.1/Documentation/arch/x86/ |
| D | sva.rst | 34 Unlike Single Root I/O Virtualization (SR-IOV), Scalable IOV (SIOV) permits
224 Scalable I/O Virtualization builds on the PASID concept to create device
280 https://01.org/blogs/2019/assignable-interfaces-intel-scalable-i/o-virtualization-linux
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| /linux-6.12.1/Documentation/mm/damon/ |
| D | index.rst | 15 - *scalable* (the upper-bound of the overhead is in constant range regardless
|