Searched +full:rzn1 +full:- +full:miic (Results 1 – 10 of 10) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/net/pcs/ |
D | renesas,rzn1-miic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Clément Léger <clement.leger@bootlin.com> 17 '#address-cells': 20 '#size-cells': 25 - enum: 26 - renesas,r9a06g032-miic 27 - const: renesas,rzn1-miic [all …]
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/linux-6.12.1/drivers/net/pcs/ |
D | pcs-rzn1-miic.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/pcs-rzn1-miic.h> 17 #include <dt-bindings/net/pcs-rzn1-miic.h> 52 #define MIIC_MODCTRL_CONF_NONE -1 55 * struct modctrl_match - Matching table entry for convctrl configuration 59 * then index 1 - 5 are CONV1 - CONV5. 122 * struct miic - MII converter structure 125 * @lock: Lock used for read-modify-write access 127 struct miic { struct 134 * struct miic_port - Per port MII converter struct [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 4 pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-plat.o \ 5 pcs-xpcs-nxp.o pcs-xpcs-wx.o 7 obj-$(CONFIG_PCS_XPCS) += pcs_xpcs.o 8 obj-$(CONFIG_PCS_LYNX) += pcs-lynx.o 9 obj-$(CONFIG_PCS_MTK_LYNXI) += pcs-mtk-lynxi.o 10 obj-$(CONFIG_PCS_RZN1_MIIC) += pcs-rzn1-miic.o
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/linux-6.12.1/arch/arm/boot/dts/renesas/ |
D | r9a06g032-rzn1d400-db.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the RZN1D-DB Board 9 /dts-v1/; 11 #include <dt-bindings/pinctrl/rzn1-pinctrl.h> 12 #include <dt-bindings/net/pcs-rzn1-miic.h> 17 model = "RZN1D-DB Board"; 18 compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"; 21 stdout-path = "serial0:115200n8"; 30 pinctrl-0 = <&pins_can0>; 31 pinctrl-names = "default"; [all …]
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D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a7"; 30 compatible = "arm,cortex-a7"; 33 enable-method = "renesas,r9a06g032-smp"; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | renesas,rzn1-gmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Romain Gantois <romain.gantois@bootlin.com> 17 - renesas,r9a06g032-gmac 18 - renesas,rzn1-gmac 20 - compatible 23 - $ref: snps,dwmac.yaml# 28 - enum: [all …]
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/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/ |
D | dwmac-rzn1.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2024 Schneider-Electric 9 #include <linux/pcs-rzn1-miic.h> 18 struct device_node *np = priv->device->of_node; in rzn1_dwmac_pcs_init() 22 pcs_node = of_parse_phandle(np, "pcs-handle", 0); in rzn1_dwmac_pcs_init() 25 pcs = miic_create(priv->device, pcs_node); in rzn1_dwmac_pcs_init() 30 priv->hw->phylink_pcs = pcs; in rzn1_dwmac_pcs_init() 38 if (priv->hw->phylink_pcs) in rzn1_dwmac_pcs_exit() 39 miic_destroy(priv->hw->phylink_pcs); in rzn1_dwmac_pcs_exit() 45 return priv->hw->phylink_pcs; in rzn1_dwmac_select_pcs() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/dsa/ |
D | renesas,rzn1-a5psw.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Clément Léger <clement.leger@bootlin.com> 17 - $ref: dsa.yaml#/$defs/ethernet-ports 22 - enum: 23 - renesas,r9a06g032-a5psw 24 - const: renesas,rzn1-a5psw 31 - description: Device Level Ring (DLR) interrupt [all …]
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/linux-6.12.1/drivers/net/dsa/ |
D | rzn1_a5psw.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 15 #include <linux/pcs-rzn1-miic.h> 199 #define A5PSW_CPU_PORT (A5PSW_PORTS_NUM - 1) 209 #define A5PSW_MAX_MTU (A5PSW_JUMBO_LEN - A5PSW_EXTRA_MTU_LEN) 235 * struct a5psw - switch struct 246 * @reg_lock: Lock for register read-modify-write operation 256 struct phylink_pcs *pcs[A5PSW_PORTS_NUM - 1];
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/linux-6.12.1/ |
D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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