Searched full:rtcclk (Results 1 – 19 of 19) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/rtc/ |
D | xgene-rtc.txt | 15 rtcclk: rtcclk { 19 clock-output-names = "rtcclk"; 27 clocks = <&rtcclk 0>;
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/linux-6.12.1/arch/arm64/boot/dts/exynos/ |
D | exynos850-e850-96.dts | 165 rtcclk: clock-rtcclk { label 167 clock-output-names = "rtcclk"; 174 clocks = <&oscclk>, <&rtcclk>, 178 clock-names = "oscclk", "rtcclk", "dout_hsi_bus", 230 clocks = <&cmu_apm CLK_GOUT_RTC_PCLK>, <&rtcclk>;
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/linux-6.12.1/arch/riscv/boot/dts/sifive/ |
D | hifive-unleashed-a00.dts | 9 /* Clock frequency (in Hz) of the PCB crystal for rtcclk */ 37 rtcclk: rtcclk { label 41 clock-output-names = "rtcclk";
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D | hifive-unmatched-a00.dts | 10 /* Clock frequency (in Hz) of the PCB crystal for rtcclk */ 38 rtcclk: rtcclk { label 42 clock-output-names = "rtcclk";
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D | fu540-c000.dtsi | 198 clocks = <&hfclk>, <&rtcclk>;
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D | fu740-c000.dtsi | 199 clocks = <&hfclk>, <&rtcclk>;
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/linux-6.12.1/Documentation/devicetree/bindings/clock/sifive/ |
D | fu540-prci.yaml | 20 The hfclk and rtcclk nodes are required, and represent physical 39 - const: rtcclk 57 clocks = <&hfclk>, <&rtcclk>;
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D | fu740-prci.yaml | 21 The hfclk and rtcclk nodes are required, and represent physical 40 - const: rtcclk 61 clocks = <&hfclk>, <&rtcclk>;
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/linux-6.12.1/drivers/rtc/ |
D | rtc-sunplus.c | 59 struct clk *rtcclk; member 254 sp_rtc->rtcclk = devm_clk_get(&plat_dev->dev, NULL); in sp_rtc_probe() 255 if (IS_ERR(sp_rtc->rtcclk)) in sp_rtc_probe() 256 return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rtcclk), in sp_rtc_probe() 264 ret = clk_prepare_enable(sp_rtc->rtcclk); in sp_rtc_probe() 301 clk_disable_unprepare(sp_rtc->rtcclk); in sp_rtc_probe() 312 clk_disable_unprepare(sp_rtc->rtcclk); in sp_rtc_remove()
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | samsung,exynos850-clock.yaml | 20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external 252 - const: rtcclk
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D | samsung,exynosautov920-clock.yaml | 19 two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 Hz).
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D | samsung,exynosautov9-clock.yaml | 20 two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
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/linux-6.12.1/drivers/pinctrl/pxa/ |
D | pinctrl-pxa25x.c | 31 PXA_FUNCTION(1, 1, "RTCCLK")), 173 PXA_FUNCTION(1, 1, "RTCCLK"),
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/linux-6.12.1/drivers/pinctrl/ |
D | pinctrl-amd.c | 142 0 0 61 usec (2 RtcClk) 976 usec in amd_gpio_set_debounce() 143 0 1 244 usec (8 RtcClk) 3.9 msec in amd_gpio_set_debounce() 144 1 0 15.6 msec (512 RtcClk) 250 msec in amd_gpio_set_debounce() 145 1 1 62.5 msec (2048 RtcClk) 1 sec in amd_gpio_set_debounce()
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/linux-6.12.1/arch/arm64/boot/dts/apm/ |
D | apm-storm.dtsi | 342 rtcclk: rtcclk@17000000 { label 352 clock-output-names = "rtcclk"; 971 clocks = <&rtcclk 0>;
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/linux-6.12.1/drivers/clk/sifive/ |
D | sifive-prci.h | 19 * hfclk and rtcclk
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/linux-6.12.1/arch/arm/boot/dts/microchip/ |
D | at91-sama5d27_wlsom1.dtsi | 367 conf-rtcclk {
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/linux-6.12.1/drivers/clk/hisilicon/ |
D | clk-hi3620.c | 137 { HI3620_RTCCLK, "rtcclk", "pclk", CLK_SET_RATE_PARENT, 0x20, 5, 0, },
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/linux-6.12.1/drivers/clk/samsung/ |
D | clk-exynos850.c | 1610 PNAME(mout_hsi_rtc_p) = { "rtcclk", "oscclk" };
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