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Searched full:rtcclk (Results 1 – 19 of 19) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/rtc/
Dxgene-rtc.txt15 rtcclk: rtcclk {
19 clock-output-names = "rtcclk";
27 clocks = <&rtcclk 0>;
/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynos850-e850-96.dts165 rtcclk: clock-rtcclk { label
167 clock-output-names = "rtcclk";
174 clocks = <&oscclk>, <&rtcclk>,
178 clock-names = "oscclk", "rtcclk", "dout_hsi_bus",
230 clocks = <&cmu_apm CLK_GOUT_RTC_PCLK>, <&rtcclk>;
/linux-6.12.1/arch/riscv/boot/dts/sifive/
Dhifive-unleashed-a00.dts9 /* Clock frequency (in Hz) of the PCB crystal for rtcclk */
37 rtcclk: rtcclk { label
41 clock-output-names = "rtcclk";
Dhifive-unmatched-a00.dts10 /* Clock frequency (in Hz) of the PCB crystal for rtcclk */
38 rtcclk: rtcclk { label
42 clock-output-names = "rtcclk";
Dfu540-c000.dtsi198 clocks = <&hfclk>, <&rtcclk>;
Dfu740-c000.dtsi199 clocks = <&hfclk>, <&rtcclk>;
/linux-6.12.1/Documentation/devicetree/bindings/clock/sifive/
Dfu540-prci.yaml20 The hfclk and rtcclk nodes are required, and represent physical
39 - const: rtcclk
57 clocks = <&hfclk>, <&rtcclk>;
Dfu740-prci.yaml21 The hfclk and rtcclk nodes are required, and represent physical
40 - const: rtcclk
61 clocks = <&hfclk>, <&rtcclk>;
/linux-6.12.1/drivers/rtc/
Drtc-sunplus.c59 struct clk *rtcclk; member
254 sp_rtc->rtcclk = devm_clk_get(&plat_dev->dev, NULL); in sp_rtc_probe()
255 if (IS_ERR(sp_rtc->rtcclk)) in sp_rtc_probe()
256 return dev_err_probe(&plat_dev->dev, PTR_ERR(sp_rtc->rtcclk), in sp_rtc_probe()
264 ret = clk_prepare_enable(sp_rtc->rtcclk); in sp_rtc_probe()
301 clk_disable_unprepare(sp_rtc->rtcclk); in sp_rtc_probe()
312 clk_disable_unprepare(sp_rtc->rtcclk); in sp_rtc_remove()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dsamsung,exynos850-clock.yaml20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
252 - const: rtcclk
Dsamsung,exynosautov920-clock.yaml19 two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 Hz).
Dsamsung,exynosautov9-clock.yaml20 two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
/linux-6.12.1/drivers/pinctrl/pxa/
Dpinctrl-pxa25x.c31 PXA_FUNCTION(1, 1, "RTCCLK")),
173 PXA_FUNCTION(1, 1, "RTCCLK"),
/linux-6.12.1/drivers/pinctrl/
Dpinctrl-amd.c142 0 0 61 usec (2 RtcClk) 976 usec in amd_gpio_set_debounce()
143 0 1 244 usec (8 RtcClk) 3.9 msec in amd_gpio_set_debounce()
144 1 0 15.6 msec (512 RtcClk) 250 msec in amd_gpio_set_debounce()
145 1 1 62.5 msec (2048 RtcClk) 1 sec in amd_gpio_set_debounce()
/linux-6.12.1/arch/arm64/boot/dts/apm/
Dapm-storm.dtsi342 rtcclk: rtcclk@17000000 { label
352 clock-output-names = "rtcclk";
971 clocks = <&rtcclk 0>;
/linux-6.12.1/drivers/clk/sifive/
Dsifive-prci.h19 * hfclk and rtcclk
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91-sama5d27_wlsom1.dtsi367 conf-rtcclk {
/linux-6.12.1/drivers/clk/hisilicon/
Dclk-hi3620.c137 { HI3620_RTCCLK, "rtcclk", "pclk", CLK_SET_RATE_PARENT, 0x20, 5, 0, },
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos850.c1610 PNAME(mout_hsi_rtc_p) = { "rtcclk", "oscclk" };