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/linux-6.12.1/drivers/rtc/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
10 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
11 rtc-core-y := class.o interface.o
13 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
14 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
15 rtc-core-$(CONFIG_RTC_INTF_PROC) += proc.o
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Drtc-ds1685.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * An rtc driver for the Dallas/Maxim DS1685/DS1687 and related real-time
6 * Copyright (C) 2011-2014 Joshua Kinard <kumba@gentoo.org>.
7 * Copyright (C) 2009 Matthias Fuchs <matthias.fuchs@esd-electronics.com>.
10 * DS1685/DS1687 3V/5V Real-Time Clocks, 19-5215, Rev 4/10.
11 * DS17x85/DS17x87 3V/5V Real-Time Clocks, 19-5222, Rev 4/10.
12 * DS1689/DS1693 3V/5V Serialized Real-Time Clocks, Rev 112105.
13 * Application Note 90, Using the Multiplex Bus RTC Extended Features.
23 #include <linux/rtc.h>
26 #include <linux/rtc/ds1685.h>
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Dclass.c1 // SPDX-License-Identifier: GPL-2.0
3 * RTC subsystem, base class
15 #include <linux/rtc.h>
21 #include "rtc-core.h"
27 struct rtc_device *rtc = to_rtc_device(dev); in rtc_device_release() local
28 struct timerqueue_head *head = &rtc->timerqueue; in rtc_device_release()
31 mutex_lock(&rtc->ops_lock); in rtc_device_release()
34 mutex_unlock(&rtc->ops_lock); in rtc_device_release()
36 cancel_work_sync(&rtc->irqwork); in rtc_device_release()
38 ida_free(&rtc_ida, rtc->id); in rtc_device_release()
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Drtc-omap.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright (C) 2006 David Brownell (new RTC framework)
23 #include <linux/pinctrl/pinconf-generic.h>
27 #include <linux/rtc.h>
28 #include <linux/rtc/rtc-omap.h>
31 * The OMAP RTC is a year/month/day/hours/minutes/seconds BCD clock
32 * with century-range alarm matching, driven by the 32kHz clock.
34 * The main user-visible ways it differs from PC RTCs are by omitting
35 * "don't care" alarm fields and sub-second periodic IRQs, and having
38 * Board-specific wiring options include using split power mode with
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Dinterface.c1 // SPDX-License-Identifier: GPL-2.0
3 * RTC subsystem, interface functions
11 #include <linux/rtc.h>
18 #include <trace/events/rtc.h>
20 static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer);
21 static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer);
23 static void rtc_add_offset(struct rtc_device *rtc, struct rtc_time *tm) in rtc_add_offset() argument
27 if (!rtc->offset_secs) in rtc_add_offset()
33 * Since the reading time values from RTC device are always in the RTC in rtc_add_offset()
38 if ((rtc->start_secs > rtc->range_min && secs >= rtc->start_secs) || in rtc_add_offset()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
50 sleep states. Do not specify an RTC here unless it stays powered
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Drtc-armada38x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RTC driver for the Armada 38x Marvell SoCs
7 * Gregory Clement <gregory.clement@free-electrons.com>
15 #include <linux/rtc.h>
85 /* Initialize the RTC-MBUS bridge timing */
86 void (*update_mbus_timing)(struct armada38x_rtc *rtc);
87 u32 (*read_rtc_reg)(struct armada38x_rtc *rtc, u8 rtc_reg);
88 void (*clear_isr)(struct armada38x_rtc *rtc);
89 void (*unmask_interrupt)(struct armada38x_rtc *rtc);
95 * register write to the RTC hard macro so that the required update
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Drtc-lpc32xx.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/rtc.h>
43 __raw_readl((dev)->rtc_base + (reg))
45 __raw_writel((val), (dev)->rtc_base + (reg))
51 struct rtc_device *rtc; member
58 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev); in lpc32xx_rtc_read_time() local
60 elapsed_sec = rtc_readl(rtc, LPC32XX_RTC_UCOUNT); in lpc32xx_rtc_read_time()
68 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev); in lpc32xx_rtc_set_time() local
72 spin_lock_irq(&rtc->lock); in lpc32xx_rtc_set_time()
74 /* RTC must be disabled during count update */ in lpc32xx_rtc_set_time()
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Ddev.c1 // SPDX-License-Identifier: GPL-2.0
3 * RTC subsystem, dev interface
15 #include <linux/rtc.h>
17 #include "rtc-core.h"
25 struct rtc_device *rtc = container_of(inode->i_cdev, in rtc_dev_open() local
28 if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags)) in rtc_dev_open()
29 return -EBUSY; in rtc_dev_open()
31 file->private_data = rtc; in rtc_dev_open()
33 spin_lock_irq(&rtc->irq_lock); in rtc_dev_open()
34 rtc->irq_data = 0; in rtc_dev_open()
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Drtc-sh.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH On-Chip RTC Support
5 * Copyright (C) 2006 - 2009 Paul Mundt
9 * Based on the old arch/sh/kernel/cpu/rtc.c by:
18 #include <linux/rtc.h>
29 #include <asm/rtc.h>
31 /* Default values for RZ/A RTC */
38 #define DRV_NAME "sh-rtc"
44 #define RSECCNT RTC_REG(1) /* RTC sec */
45 #define RMINCNT RTC_REG(2) /* RTC min */
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Drtc-sc27xx.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/rtc.h>
104 struct rtc_device *rtc; member
113 * The Spreadtrum RTC controller has 3 groups registers, including time, normal
114 * alarm and auxiliary alarm. The time group registers are used to set RTC time,
126 static int sprd_rtc_clear_alarm_ints(struct sprd_rtc *rtc) in sprd_rtc_clear_alarm_ints() argument
128 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, in sprd_rtc_clear_alarm_ints()
132 static int sprd_rtc_lock_alarm(struct sprd_rtc *rtc, bool lock) in sprd_rtc_lock_alarm() argument
137 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); in sprd_rtc_lock_alarm()
147 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val); in sprd_rtc_lock_alarm()
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Drtc-at91sam9.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Based on rtc-at91rm9200.c by Rick Bronson
20 #include <linux/rtc.h>
30 * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
33 * - One of the "General Purpose Backup Registers" (GPBRs) holds the
35 * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
38 * The RTC's value is the RTT counter plus that offset. The RTC's alarm
42 * choose from, or a "real" RTC module. All systems have multiple GPBR
43 * registers available, likewise usable for more than "RTC" support.
46 #define AT91_RTT_MR 0x00 /* Real-time Mode Register */
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Drtc-lpc24xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RTC driver for NXP LPC178x/18xx/43xx Real-Time Clock (RTC)
15 #include <linux/rtc.h>
17 /* LPC24xx RTC register offsets and bits */
58 #define rtc_readl(dev, reg) readl((dev)->rtc_base + (reg))
59 #define rtc_writel(dev, reg, val) writel((val), (dev)->rtc_base + (reg))
63 struct rtc_device *rtc; member
70 struct lpc24xx_rtc *rtc = dev_get_drvdata(dev); in lpc24xx_rtc_set_time() local
72 /* Disable RTC during update */ in lpc24xx_rtc_set_time()
73 rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN); in lpc24xx_rtc_set_time()
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Drtc-meson.c1 // SPDX-License-Identifier: GPL-2.0
3 * RTC driver for the interal RTC block in the Amlogic Meson6, Meson8,
6 * The RTC is split in to two parts, the AHB front end and a simple serial
19 #include <linux/nvmem-provider.h>
25 #include <linux/rtc.h>
46 /* rtc registers accessed via rtc-serial interface */
62 struct rtc_device *rtc; /* rtc device we created */ member
71 .name = "peripheral-registers",
79 /* RTC front-end serialiser controls */
81 static void meson_rtc_sclk_pulse(struct meson_rtc *rtc) in meson_rtc_sclk_pulse() argument
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Drtc-st-lpc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * rtc-st-lpc.c - ST's LPC RTC, powered by the Low Power Timer
23 #include <linux/rtc.h>
25 #include <dt-bindings/mfd/st-lpc.h>
52 static void st_rtc_set_hw_alarm(struct st_rtc *rtc, in st_rtc_set_hw_alarm() argument
57 spin_lock_irqsave(&rtc->lock, flags); in st_rtc_set_hw_alarm()
59 writel_relaxed(1, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_set_hw_alarm()
61 writel_relaxed(msb, rtc->ioaddr + LPC_LPA_MSB_OFF); in st_rtc_set_hw_alarm()
62 writel_relaxed(lsb, rtc->ioaddr + LPC_LPA_LSB_OFF); in st_rtc_set_hw_alarm()
63 writel_relaxed(1, rtc->ioaddr + LPC_LPA_START_OFF); in st_rtc_set_hw_alarm()
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Drtc-mpc5121.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Real-time clock driver for MPC5121
7 * Copyright 2011, Dmitry Eremin-Solenikov
12 #include <linux/rtc.h>
20 u8 set_time; /* RTC + 0x00 */
21 u8 hour_set; /* RTC + 0x01 */
22 u8 minute_set; /* RTC + 0x02 */
23 u8 second_set; /* RTC + 0x03 */
25 u8 set_date; /* RTC + 0x04 */
26 u8 month_set; /* RTC + 0x05 */
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Drtc-cpcap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Motorola CPCAP PMIC RTC driver
5 * Based on cpcap-regulator.c from Motorola Linux kernel tree
9 * - use DT
10 * - use regmap
11 * - use standard interrupt framework
12 * - use managed device resources
13 * - remove custom "secure clock daemon" helpers
23 #include <linux/rtc.h>
26 #include <linux/mfd/motorola-cpcap.h>
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Drtc-mt6397.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 MediaTek Inc.
15 #include <linux/rtc.h>
16 #include <linux/mfd/mt6397/rtc.h>
19 static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc) in mtk_rtc_write_trigger() argument
24 ret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1); in mtk_rtc_write_trigger()
28 ret = regmap_read_poll_timeout(rtc->regmap, in mtk_rtc_write_trigger()
29 rtc->addr_base + RTC_BBPU, data, in mtk_rtc_write_trigger()
34 dev_err(rtc->rtc_dev->dev.parent, in mtk_rtc_write_trigger()
42 struct mt6397_rtc *rtc = data; in mtk_rtc_irq_handler_thread() local
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Drtc-jz4740.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
5 * JZ4740 SoC RTC driver
9 #include <linux/clk-provider.h>
19 #include <linux/rtc.h>
64 struct rtc_device *rtc; member
73 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
75 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
78 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
82 return readl_poll_timeout(rtc->base + JZ_REG_RTC_CTRL, ctrl, in jz4740_rtc_wait_write_ready()
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Drtc-stm32.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
18 #include <linux/pinctrl/pinconf-generic.h>
23 #include <linux/rtc.h>
120 /* Max STM32 RTC register offset is 0x3FC */
123 /* STM32 RTC driver time helpers */
126 /* STM32 RTC pinctrl helpers */
157 void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
187 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc) in stm32_rtc_wpr_unlock() argument
189 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock()
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Drtc-da9052.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/rtc.h>
19 #define rtc_err(rtc, fmt, ...) \ argument
20 dev_err(rtc->da9052->dev, "%s: " fmt, __func__, ##__VA_ARGS__)
25 struct rtc_device *rtc; member
29 static int da9052_rtc_enable_alarm(struct da9052_rtc *rtc, bool enable) in da9052_rtc_enable_alarm() argument
33 ret = da9052_reg_update(rtc->da9052, DA9052_ALARM_Y_REG, in da9052_rtc_enable_alarm()
37 rtc_err(rtc, "Failed to enable ALM: %d\n", ret); in da9052_rtc_enable_alarm()
39 ret = da9052_reg_update(rtc->da9052, DA9052_ALARM_Y_REG, in da9052_rtc_enable_alarm()
42 rtc_err(rtc, "Write error: %d\n", ret); in da9052_rtc_enable_alarm()
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Drtc-ftrtc010.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * checkpatch fixes and usage of rtc-lib code
14 #include <linux/rtc.h>
23 #define DRV_NAME "rtc-ftrtc010"
26 MODULE_DESCRIPTION("RTC driver for Gemini SoC");
56 * Looks like the RTC in the Gemini SoC is (totaly) broken
57 * We can't read/write directly the time from RTC registers.
60 * This FIX works pretty fine and Stormlinksemi aka Cortina-Networks does
61 * the same thing, without the rtc-lib.c calls.
66 struct ftrtc010_rtc *rtc = dev_get_drvdata(dev); in ftrtc010_rtc_read_time() local
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Drtc-pl030.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/rtc/rtc-pl030.c
5 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
8 #include <linux/rtc.h>
24 struct rtc_device *rtc; member
30 struct pl030_rtc *rtc = dev_id; in pl030_interrupt() local
31 writel(0, rtc->base + RTC_EOI); in pl030_interrupt()
37 struct pl030_rtc *rtc = dev_get_drvdata(dev); in pl030_read_alarm() local
39 rtc_time64_to_tm(readl(rtc->base + RTC_MR), &alrm->time); in pl030_read_alarm()
45 struct pl030_rtc *rtc = dev_get_drvdata(dev); in pl030_set_alarm() local
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Drtc-pcf50633.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* NXP PCF50633 RTC Driver
4 * (C) 2006-2008 by Openmoko, Inc.
18 #include <linux/rtc.h>
62 static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf) in pcf2rtc_time() argument
64 rtc->tm_sec = bcd2bin(pcf->time[PCF50633_TI_SEC]); in pcf2rtc_time()
65 rtc->tm_min = bcd2bin(pcf->time[PCF50633_TI_MIN]); in pcf2rtc_time()
66 rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); in pcf2rtc_time()
67 rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); in pcf2rtc_time()
68 rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); in pcf2rtc_time()
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/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-class-rtc1 What: /sys/class/rtc/
4 Contact: linux-rtc@vger.kernel.org
6 The rtc/ class subdirectory belongs to the RTC subsystem.
8 What: /sys/class/rtc/rtcX/
11 Contact: linux-rtc@vger.kernel.org
13 The /sys/class/rtc/rtc{0,1,2,3,...} directories correspond
14 to each RTC device.
16 What: /sys/class/rtc/rtcX/date
19 Contact: linux-rtc@vger.kernel.org
21 (RO) RTC-provided date in YYYY-MM-DD format
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