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/linux-6.12.1/Documentation/devicetree/bindings/serial/
Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/rs485.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RS485 serial communications
9 description: The RTS signal is capable of automatically controlling line
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
[all …]
Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 rx-tx-swap: true
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/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mm-venice-gw72xx-0x-rs422.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW72xx RS422 (RS485 full duplex):
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
[all …]
Dimx8mm-venice-gw73xx-0x-rs422.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW73xx RS422 (RS485 full duplex):
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
[all …]
Dimx8mm-venice-gw72xx-0x-rs232-rts.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW72xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 rs485-en-hog {
20 gpio-hog;
[all …]
Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW73xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
23 rs485-en-hog {
[all …]
Dimx8mn-rve-gateway.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include "imx8mn-var-som.dtsi"
13 compatible = "rve,gateway", "variscite,var-som-mx8mn", "fsl,imx8mn";
15 crystal_duart_24m: crystal-duart-24m {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <24000000>;
21 gpio-keys {
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Dimx8mm-verdin-dev.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 sound_card: sound-card {
8 compatible = "simple-audio-card";
9 simple-audio-card,bitclock-master = <&dailink_master>;
10 simple-audio-card,format = "i2s";
11 simple-audio-card,frame-master = <&dailink_master>;
12 simple-audio-card,mclk-fs = <256>;
13 simple-audio-card,name = "verdin-nau8822";
14 simple-audio-card,routing =
25 simple-audio-card,widgets =
[all …]
Dimx8mp-verdin-dev.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 native-hdmi-connector {
8 compatible = "hdmi-connector";
14 remote-endpoint = <&hdmi_tx_out>;
19 reg_eth2phy: regulator-eth2phy {
20 compatible = "regulator-fixed";
21 enable-active-high;
23 off-on-delay-us = <500000>;
24 regulator-max-microvolt = <3300000>;
25 regulator-min-microvolt = <3300000>;
[all …]
Dimx8mm-venice-gw7901.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
30 stdout-path = &uart2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
Dimx8mm-venice-gw73xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 led-controller {
18 compatible = "gpio-leds";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
26 default-state = "on";
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Dam335x-regor.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/am33xx.h>
12 model = "Phytec AM335x phyBOARD-REGOR";
13 compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";
16 compatible = "regulator-fixed";
17 regulator-name = "vcc3v3";
18 regulator-min-microvolt = <3300000>;
19 regulator-max-microvolt = <3300000>;
20 regulator-boot-on;
[all …]
/linux-6.12.1/drivers/tty/serial/
Dserial_core.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
43 * lockdep: port->lock is initialized in two places, but we
44 * want only one lock-class:
48 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
51 * Max time with active RTS before/after data is sent.
62 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled()
67 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref()
68 return state->uart_port; in uart_port_ref()
74 if (atomic_dec_and_test(&uport->state->refcount)) in uart_port_deref()
[all …]
Dimx.c1 // SPDX-License-Identifier: GPL-2.0+
31 #include <linux/dma-mapping.h>
34 #include <linux/dma/imx-dma.h>
75 #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */
83 #define UCR2_IRTS (1<<14) /* Ignore RTS pin */
126 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
129 #define USR1_RTSS (1<<14) /* RTS pin status */
131 #define USR1_RTSD (1<<12) /* RTS delta */
149 #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */
162 /* We've been assigned a range on the "Low-density serial ports" major */
[all …]
Datmel_serial.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/clk-provider.h>
24 #include <linux/dma-mapping.h>
46 * These two offsets are substracted from the RX FIFO size to define the RTS
47 * high and low thresholds
62 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
71 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
167 bool hd_start_rx; /* can start RX during half-duplex operation */
197 { .compatible = "atmel,at91rm9200-usart-serial" },
210 return __raw_readl(port->membase + reg); in atmel_uart_readl()
[all …]
Dsc16is7xx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - common code
53 * - only on 75x/76x
56 * - only on 75x/76x
59 * - only on 75x/76x
62 * - only on 75x/76x
71 #define SC16IS7XX_DLL_REG (0x00) /* Divisor Latch Low */
90 /* IER register bits - write only if (EFR[4] == 1) */
103 /* FCR register bits - write only if (EFR[4] == 1) */
113 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
[all …]
Dxilinx_uartps.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2011 - 2014 Xilinx, Inc.
7 * This driver has originally been pushed by Xilinx using a Zynq-branding. This
42 MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
47 MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
90 #define CDNS_UART_MR_CLKSEL 0x00000001 /* Pre-scalar selection */
181 #define CDNS_UART_SR_TACTIVE 0x00000800 /* TX state machine active */
190 * struct cdns_uart - device data
200 * @rs485_tx_started: RS485 tx state
233 * cdns_uart_handle_rx - Handle the received bytes along with Rx errors.
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6ul-kontron-bl-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
11 gpio-leds {
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 label = "debug-led1";
19 default-state = "off";
20 linux,default-trigger = "heartbeat";
24 label = "debug-led2";
[all …]
Dimx7-mba7.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Device Tree Include file for TQ-Systems MBa7 carrier board.
5 * Copyright (C) 2016 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/net/ti-dp83867.h>
20 /delete-property/ mmc2;
26 compatible = "gpio-beeper";
31 stdout-path = &uart6;
34 gpio_buttons: gpio-keys {
[all …]
Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
[all …]
Dimx6qdl-mba6.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 /delete-property/ mmc2;
19 /delete-property/ mmc3;
24 stdout-path = &uart2;
[all …]
Dimx6dl-plybas.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
17 stdout-path = &uart4;
21 compatible = "gpio-keys";
24 button-start {
30 button-clean {
38 compatible = "gpio-leds";
39 pinctrl-names = "default";
[all …]
/linux-6.12.1/drivers/usb/serial/
Dxr_serial.c1 // SPDX-License-Identifier: GPL-2.0+
10 * https://lore.kernel.org/r/20180404070634.nhspvmxcjwfgjkcv@advantechmxl-desktop
240 u8 channel; /* zero-based index or interface number */
241 struct serial_rs485 rs485; member
247 const struct xr_type *type = data->type; in xr_set_reg()
248 struct usb_serial *serial = port->serial; in xr_set_reg()
251 ret = usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0), in xr_set_reg()
252 type->set_reg, in xr_set_reg()
253 USB_DIR_OUT | USB_TYPE_VENDOR | type->reg_recipient, in xr_set_reg()
257 dev_err(&port->dev, "Failed to set reg 0x%02x: %d\n", reg, ret); in xr_set_reg()
[all …]
/linux-6.12.1/drivers/tty/serial/8250/
D8250_omap.c1 // SPDX-License-Identifier: GPL-2.0
3 * 8250-core based driver for the OMAP internal UART
5 * based on omap-serial.c, Copyright (C) 2010 Texas Instruments.
28 #include <linux/dma-mapping.h>
117 /* Timeout low and High */
137 atomic_t active; member
169 return readl(priv->membase + (reg << OMAP_UART_REGSHIFT)); in uart_read()
179 struct omap8250_priv *priv = up->port.private_data; in __omap8250_set_mctrl()
184 if (!mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS)) { in __omap8250_set_mctrl()
186 * Turn off autoRTS if RTS is lowered and restore autoRTS in __omap8250_set_mctrl()
[all …]
/linux-6.12.1/include/linux/
Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
25 ((port)->cons && (port)->cons->index == (port)->line)
37 * struct uart_ops -- interface between serial_core and the driver
58 * - %TIOCM_RTS RTS signal.
59 * - %TIOCM_DTR DTR signal.
60 * - %TIOCM_OUT1 OUT1 signal.
61 * - %TIOCM_OUT2 OUT2 signal.
62 * - %TIOCM_LOOP Set the port into loopback mode.
65 * active. If the bit is clear, the signal should be driven
68 * Locking: @port->lock taken.
[all …]

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