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/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
[all …]
Dusb-drd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
16 which the device and its descriptors are compliant, in binary-coded
18 features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
25 Tells Dual-Role USB controllers that we want to work on a particular
26 mode. In case this attribute isn't passed via DT, USB DRD controllers
[all …]
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
[all …]
Drealtek,rtd-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/realtek,rtd-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stanley Chang <stanley_chang@realtek.com>
15 and USB 3.0 in host or dual-role mode.
20 - enum:
21 - realtek,rtd1295-dwc3
22 - realtek,rtd1315e-dwc3
23 - realtek,rtd1319-dwc3
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/linux-6.12.1/drivers/usb/cdns3/
DKconfig8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
34 Cadence USBSS-DEV driver.
36 This controller supports FF, HS and SS mode. It doesn't support
37 LS and SSP mode.
51 tristate "Cadence USB3 support on PCIe-based platforms"
53 default USB_CDNS3
[all …]
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
14 #include <linux/dma-mapping.h>
24 #include "host-export.h"
29 static int cdns_role_start(struct cdns *cdns, enum usb_role role) in cdns_role_start() argument
33 if (WARN_ON(role > USB_ROLE_DEVICE)) in cdns_role_start()
36 mutex_lock(&cdns->mutex); in cdns_role_start()
37 cdns->role = role; in cdns_role_start()
38 mutex_unlock(&cdns->mutex); in cdns_role_start()
[all …]
/linux-6.12.1/drivers/usb/mtu3/
Dmtu3_dr.c1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3_dr.c - dual role switch and host glue layer
24 mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION); in toggle_opstate()
25 mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN); in toggle_opstate()
28 /* only port0 supports dual-role mode */
32 void __iomem *ibase = ssusb->ippc_base; in ssusb_port0_switch()
35 dev_dbg(ssusb->dev, "%s (switch u%d port0 to %s)\n", __func__, in ssusb_port0_switch()
44 /* 2. power on, enable u2 port0 and select its mode */ in ssusb_port0_switch()
56 /* 2. power on, enable u3 port0 and select its mode */ in ssusb_port0_switch()
71 dev_dbg(ssusb->dev, "%s\n", __func__); in switch_port_to_host()
[all …]
Dmtu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3.h - MediaTek USB3 DRD header
26 #include <linux/usb/role.h>
35 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
36 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
37 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
39 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
40 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
41 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
43 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
[all …]
/linux-6.12.1/drivers/usb/dwc3/
Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
3 * drd.c - DesignWare USB3 DRD Controller Dual-role support
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com
21 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_disable_events()
24 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_disable_events()
29 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_enable_events()
32 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_enable_events()
37 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_clear_events()
39 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_clear_events()
56 spin_lock(&dwc->lock); in dwc3_otg_thread_irq()
[all …]
Ddwc3-rtk.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-rtk.c - Realtek DWC3 Specific Glue layer
19 #include <linux/usb/role.h>
65 static void switch_usb2_role(struct dwc3_rtk *rtk, enum usb_role role) in switch_usb2_role() argument
70 reg = rtk->regs + WRAP_USB2_PHY_REG; in switch_usb2_role()
73 switch (role) { in switch_usb2_role()
80 default: in switch_usb2_role()
81 dev_dbg(rtk->dev, "%s: role=%d\n", __func__, role); in switch_usb2_role()
86 static void switch_dwc3_role(struct dwc3_rtk *rtk, enum usb_role role) in switch_dwc3_role() argument
88 if (!rtk->dwc->role_sw) in switch_dwc3_role()
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/linux-6.12.1/drivers/net/wireless/realtek/rtw89/
Dchan.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2020-2022 Realtek Corporation
16 switch (band) { in rtw89_get_subband_type()
17 default: in rtw89_get_subband_type()
19 switch (center_chan) { in rtw89_get_subband_type()
20 default: in rtw89_get_subband_type()
25 switch (center_chan) { in rtw89_get_subband_type()
26 default: in rtw89_get_subband_type()
35 switch (center_chan) { in rtw89_get_subband_type()
36 default: in rtw89_get_subband_type()
[all …]
/linux-6.12.1/drivers/usb/dwc2/
Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
3 * drd.c - DesignWare USB2 DRD Controller Dual-role support
13 #include <linux/usb/role.h>
25 spin_lock_irqsave(&hsotg->lock, flags); in dwc2_ovr_init()
30 if (hsotg->role_sw_default_mode == USB_DR_MODE_HOST) in dwc2_ovr_init()
32 else if (hsotg->role_sw_default_mode == USB_DR_MODE_PERIPHERAL) in dwc2_ovr_init()
36 spin_unlock_irqrestore(&hsotg->lock, flags); in dwc2_ovr_init()
38 dwc2_force_mode(hsotg, (hsotg->dr_mode == USB_DR_MODE_HOST) || in dwc2_ovr_init()
39 (hsotg->role_sw_default_mode == USB_DR_MODE_HOST)); in dwc2_ovr_init()
46 /* Check if A-Session is already in the right state */ in dwc2_ovr_avalid()
[all …]
/linux-6.12.1/Documentation/driver-api/usb/
Dtypec.rst3 USB Type-C connector class
7 ------------
9 The typec class is meant for describing the USB Type-C ports in a system to the
14 The platforms are expected to register every USB Type-C port they have with the
15 class. In a normal case the registration will be done by a USB Type-C or PD PHY
18 considers the component registering the USB Type-C ports with the class as "port
26 attributes are described in Documentation/ABI/testing/sysfs-class-typec.
29 --------------------
36 "port0-partner". Full path to the device would be
37 /sys/class/typec/port0/port0-partner/.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/linux-6.12.1/drivers/usb/musb/
Dmediatek.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
16 #include <linux/usb/role.h>
51 enum usb_role role; member
57 struct device *dev = glue->dev; in mtk_musb_clks_get()
59 glue->clks[0].id = "main"; in mtk_musb_clks_get()
60 glue->clks[1].id = "mcu"; in mtk_musb_clks_get()
61 glue->clks[2].id = "univpll"; in mtk_musb_clks_get()
63 return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, glue->clks); in mtk_musb_clks_get()
66 static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role) in mtk_otg_switch_set() argument
[all …]
/linux-6.12.1/drivers/usb/fotg210/
Dfotg210-core.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Central probing code for the FOTG210 dual role driver
21 /* Role Register 0x80 */
23 #define FOTG210_RR_ID BIT(21) /* 1 = B-device, 0 = A-device */
27 * Gemini-specific initialization function, only executed on the
30 * The gemini USB blocks are connected to either Mini-A (host mode) or
31 * Mini-B (peripheral mode) plugs. There is no role switch support on the
32 * Gemini SoC, just either-or.
43 enum usb_dr_mode mode) in fotg210_gemini_init() argument
45 struct device *dev = fotg->dev; in fotg210_gemini_init()
[all …]
/linux-6.12.1/drivers/usb/phy/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
21 in host mode, low speed.
42 depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, NOP can't be built-in
46 built-in with usb ip or which are autonomous and doesn't require any
73 The definition of internal PHY APIs are in the mach-omap2 layer.
76 tristate "GPIO based peripheral-only VBUS sensing 'transceiver'"
86 NOT support role switch. OTG devices that can do role switch
95 controller is needed to switch between host and peripheral modes.
98 will be called phy-omap-otg.
111 bool "Device in USB host mode by default"
[all …]
/linux-6.12.1/drivers/usb/chipidea/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - ChipIdea USB IP core family device controller
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
12 * - Four transfers are supported, usbtest is passed
13 * - USB Certification for gadget: CH9 and Mass Storage are passed
14 * - Low power mode
15 * - USB wakeup
19 #include <linux/dma-mapping.h>
105 ci->hw_bank.regmap[i] = in hw_alloc_regmap()
106 (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) + in hw_alloc_regmap()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mp-venice-gw71xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 compatible = "gpio-usb-b-connector", "usb-b-connector";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_usbcon1>;
16 label = "Type-C";
17 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
21 remote-endpoint = <&usb3_dwc>;
[all …]
/linux-6.12.1/drivers/usb/typec/ucsi/
Ducsi.c1 // SPDX-License-Identifier: GPL-2.0
3 * USB Type-C Connector System Software Interface driver
21 * UCSI_TIMEOUT_MS - PPM communication timeout
31 * UCSI_SWAP_TIMEOUT_MS - Timeout for role swap requests
49 test_bit(ACK_PENDING, &ucsi->flags)) in ucsi_notify_common()
50 complete(&ucsi->complete); in ucsi_notify_common()
53 test_bit(COMMAND_PENDING, &ucsi->flags)) in ucsi_notify_common()
54 complete(&ucsi->complete); in ucsi_notify_common()
64 set_bit(ACK_PENDING, &ucsi->flags); in ucsi_sync_control_common()
66 set_bit(COMMAND_PENDING, &ucsi->flags); in ucsi_sync_control_common()
[all …]
/linux-6.12.1/drivers/extcon/
Dextcon-axp288.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * extcon-axp288.c - X-Power AXP288 PMIC extcon cable detection driver
5 * Copyright (c) 2017-2018 Hans de Goede <hdegoede@redhat.com>
19 #include <linux/extcon-provider.h>
22 #include <linux/usb/role.h>
26 #include <asm/intel-family.h>
137 ret = regmap_read(info->regmap, AXP288_PS_BOOT_REASON_REG, &val); in axp288_extcon_log_rsi()
139 dev_err(info->dev, "failed to read reset source indicator\n"); in axp288_extcon_log_rsi()
143 bits = val & GENMASK(ARRAY_SIZE(axp288_pwr_up_down_info) - 1, 0); in axp288_extcon_log_rsi()
145 dev_dbg(info->dev, "%s\n", axp288_pwr_up_down_info[i]); in axp288_extcon_log_rsi()
[all …]
/linux-6.12.1/drivers/usb/typec/
Dwusb3801.c1 // SPDX-License-Identifier: GPL-2.0
3 * Willsemi WUSB3801 Type-C port controller driver
101 switch (wusb3801->port_type) { in wusb3801_get_default_role()
107 default: in wusb3801_get_default_role()
108 if (wusb3801->cap.prefer_role == TYPEC_SOURCE) in wusb3801_get_default_role()
116 switch (type) { in wusb3801_map_port_type()
122 default: in wusb3801_map_port_type()
127 static int wusb3801_map_pwr_opmode(enum typec_pwr_opmode mode) in wusb3801_map_pwr_opmode() argument
129 switch (mode) { in wusb3801_map_pwr_opmode()
131 default: in wusb3801_map_pwr_opmode()
[all …]
Danx7411.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Driver for Analogix ANX7411 USB Type-C and PD controller
24 #include <linux/usb/role.h>
337 int mode; in anx7411_detect_power_mode() local
339 ret = anx7411_reg_read(ctx->spi_client, REQUEST_CURRENT); in anx7411_detect_power_mode()
343 ctx->typec.request_current = ret * CURRENT_UNIT; /* 50ma per unit */ in anx7411_detect_power_mode()
345 ret = anx7411_reg_read(ctx->spi_client, REQUEST_VOLTAGE); in anx7411_detect_power_mode()
349 ctx->typec.request_voltage = ret * VOLTAGE_UNIT; /* 100mv per unit */ in anx7411_detect_power_mode()
351 if (ctx->psy_online == ANX7411_PSY_OFFLINE) { in anx7411_detect_power_mode()
352 ctx->psy_online = ANX7411_PSY_FIXED_ONLINE; in anx7411_detect_power_mode()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsc8180x-lenovo-flex-5g.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 /dts-v1/;
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 #include "sc8180x-pmics.dtsi"
[all …]
/linux-6.12.1/drivers/phy/tegra/
Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
53 .compatible = "nvidia,tegra124-xusb-padctl",
[all …]

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