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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Drockchip,rk3328-codec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,rk3328-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip rk3328 internal codec
10 - Heiko Stuebner <heiko@sntech.de>
12 - $ref: dai-common.yaml#
17 const: rockchip,rk3328-codec
24 - description: clock for audio codec
25 - description: clock for I2S master clock
[all …]
/linux-6.12.1/sound/soc/codecs/
Drk3328_codec.c1 // SPDX-License-Identifier: GPL-2.0
3 // rk3328 ALSA SoC Audio driver
22 * 0: -39dB
56 static int rk3328_codec_reset(struct rk3328_codec_priv *rk3328) in rk3328_codec_reset() argument
58 regmap_write(rk3328->regmap, CODEC_RESET, 0x00); in rk3328_codec_reset()
60 regmap_write(rk3328->regmap, CODEC_RESET, 0x03); in rk3328_codec_reset()
67 struct rk3328_codec_priv *rk3328 = in rk3328_set_dai_fmt() local
68 snd_soc_component_get_drvdata(dai->component); in rk3328_set_dai_fmt()
79 return -EINVAL; in rk3328_set_dai_fmt()
82 regmap_update_bits(rk3328->regmap, DAC_INIT_CTRL1, in rk3328_set_dai_fmt()
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Drk3328_codec.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * rk3328 ALSA SoC Audio driver
13 /* codec register */
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 snd-soc-88pm860x-y := 88pm860x-codec.o
3 snd-soc-ab8500-codec-y := ab8500-codec.o
4 snd-soc-ac97-y := ac97.o
5 snd-soc-ad1836-y := ad1836.o
6 snd-soc-ad193x-y := ad193x.o
7 snd-soc-ad193x-spi-y := ad193x-spi.o
8 snd-soc-ad193x-i2c-y := ad193x-i2c.o
9 snd-soc-ad1980-y := ad1980.o
10 snd-soc-ad73311-y := ad73311.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # modular, meaning we can't build the codec driver in with I2C support.
5 # setting - SPI can't be modular so that case doesn't need to be covered.
12 menu "CODEC drivers"
15 tristate "Build all ASoC CODEC drivers"
353 Normally ASoC codec drivers are only built if a machine driver which
415 tristate "Build generic ASoC AC97 CODEC driver"
452 tristate "Analog Devices ADAU1372 CODEC (I2C)"
458 tristate "Analog Devices ADAU1372 CODEC (SPI)"
469 tristate "Analog Devices ADAU1701 CODEC"
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/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Drockchip,rk3328-grf-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3328 General Register Files GPIO controller
10 The Rockchip RK3328 General Register File (GRF) outputs only the
11 GPIO_MUTE pin, originally for codec mute control, but it can also be used
26 - Heiko Stuebner <heiko@sntech.de>
30 const: rockchip,rk3328-grf-gpio
32 gpio-controller: true
[all …]
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "rockchip,rk3328";
[all …]
Drk3328-roc-pc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (c) 2021 T-Chip Intelligent Technology Co., Ltd
4 /dts-v1/;
6 #include <dt-bindings/input/input.h>
8 #include "rk3328-roc-cc.dts"
11 model = "Firefly ROC-RK3328-PC";
12 compatible = "firefly,roc-rk3328-pc", "rockchip,rk3328";
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 0>;
[all …]
Drk3328-roc-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
6 /dts-v1/;
7 #include "rk3328.dtsi"
10 model = "Firefly roc-rk3328-cc";
11 compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
20 stdout-path = "serial2:1500000n8";
23 gmac_clkin: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
[all …]
Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
Drk3328-rock64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3328.dtsi"
11 compatible = "pine64,rock64", "rockchip,rk3328";
20 stdout-path = "serial2:1500000n8";
23 gmac_clkin: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "gmac_clkin";
27 #clock-cells = <0>;
[all …]
Drk3328-rock-pi-e.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org>
5 * Based on ./rk3328-rock64.dts, which is
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/rockchip.h>
17 #include "rk3328.dtsi"
21 compatible = "radxa,rockpi-e", "rockchip,rk3328";
[all …]
Drk356x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
Drk3328-a1.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
2 // Copyright (c) 2017-2019 Arm Ltd.
4 /dts-v1/;
5 #include "rk3328.dtsi"
9 compatible = "azw,beelink-a1", "rockchip,rk3328";
21 * /-------
22 * L / o <- Gnd
23 * e / o <-- Rx
24 * f / o <--- Tx
25 * t / o <---- +3.3v
[all …]
Drk3588-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
Drk3318-a95x-z2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "rk3328.dtsi"
9 compatible = "zkmagic,a95x-z2", "rockchip,rk3318";
19 stdout-path = "serial2:1500000n8";
22 adc-keys {
23 compatible = "adc-keys";
24 io-channels = <&saradc 0>;
25 io-channel-names = "buttons";
[all …]
Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
/linux-6.12.1/drivers/media/platform/verisilicon/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
22 will be called hantro-vpu.
29 Enable the reference frame compression feature for the HEVC codec.
54 Enable support for RK3288, RK3328, and RK3399 SoCs.
Dhantro_drv.c1 // SPDX-License-Identifier: GPL-2.0
3 * Hantro VPU codec driver
9 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-core.h>
25 #include <media/videobuf2-vmalloc.h>
31 #define DRIVER_NAME "hantro-vpu"
36 "Debug level - higher value produces more verbose messages");
42 ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, id); in hantro_get_ctrl()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/
Drockchip,vdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
12 description: |-
19 - const: rockchip,rk3399-vdec
20 - items:
21 - enum:
22 - rockchip,rk3228-vdec
23 - rockchip,rk3328-vdec
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Drockchip-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ezequiel Garcia <ezequiel@collabora.com>
19 - enum:
20 - rockchip,rk3036-vpu
21 - rockchip,rk3066-vpu
22 - rockchip,rk3288-vpu
23 - rockchip,rk3328-vpu
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