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/linux-6.12.1/drivers/clk/mxs/
Dclk-imx28.c114 * so set frac0 to get a 288 MHz ref_io0 and ref_io1. in clk_misc_init()
123 static const char *const sel_io0[] __initconst = { "ref_io0", "ref_xtal", };
133 ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, enumerator
174 clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 3); in mx28_clocks_init()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dimx28-clock.yaml25 ref_io0 6