Searched +full:r9a07g044 +full:- +full:irqc (Results 1 – 7 of 7) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
D | renesas,rzg2l-irqc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rzg2l-irqc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 11 - Geert Uytterhoeven <geert+renesas@glider.be> 15 interrupts of NMI, IRQ, and GPIOINT and the interrupts of the built-in peripheral 17 - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI interrupts 18 - GPIO pins used as external interrupt input pins, mapped to 32 GIC SPI interrupts 19 - NMI edge select (NMI is not treated as NMI exception and supports fall edge and [all …]
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/linux-6.12.1/arch/arm64/boot/dts/renesas/ |
D | r9a07g044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g044-cpg.h> 12 compatible = "renesas,r9a07g044"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; [all …]
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D | r9a07g043u.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "arm,cortex-a55"; 23 #cooling-cells = <2>; 24 next-level-cache = <&L3_CA55>; 25 enable-method = "psci"; 27 operating-points-v2 = <&cluster0_opp>; 30 L3_CA55: cache-controller-0 { [all …]
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D | r9a07g054.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g054-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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D | r9a08g045.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a08g045-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <1>; 18 #size-cells = <0>; 21 compatible = "arm,cortex-a55"; 24 #cooling-cells = <2>; 25 next-level-cache = <&L3_CA55>; [all …]
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D | r9a07g043.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/clock/r9a07g043-cpg.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 15 audio_clk1: audio1-clk { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 19 clock-frequency = <0>; 22 audio_clk2: audio2-clk { 23 compatible = "fixed-clock"; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/renesas/ |
D | renesas-soc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/soc/renesas/renesas-soc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 16 renesas,SoC-IP 19 renesas,r8a77965-csi2 28 pattern: "^renesas,.+-.+$" 30 - compatible [all …]
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