Home
last modified time | relevance | path

Searched +full:r8a77990 +full:- +full:lvds (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
[all …]
/linux-6.12.1/arch/arm64/boot/dts/renesas/
Dr8a77990.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h>
13 compatible = "renesas,r8a77990";
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/
Drenesas,du.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Display Unit (DU)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
[all …]
/linux-6.12.1/drivers/gpu/drm/renesas/rcar-du/
Drcar_du_drv.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit DRM driver
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 #include <linux/dma-mapping.h>
31 /* -----------------------------------------------------------------------------
44 * R8A774[34] has one RGB output and one LVDS output
91 * R8A77470 has two RGB outputs, one LVDS output, and
120 * R8A774A1 has one RGB output, one LVDS output and one HDMI
151 * R8A774B1 has one RGB output, one LVDS output and one HDMI
180 * R8A774C0 has one RGB output and two LVDS outputs
[all …]
Drcar_lvds.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
13 #include <linux/media-bus-format.h>
50 #define RCAR_LVDS_QUIRK_LANES BIT(0) /* LVDS lanes 1 and 3 inverted */
54 #define RCAR_LVDS_QUIRK_DUAL_LINK BIT(4) /* Supports dual-link operation */
59 void (*pll_setup)(struct rcar_lvds *lvds, unsigned int freq);
86 static u32 rcar_lvds_read(struct rcar_lvds *lvds, u32 reg) in rcar_lvds_read() argument
88 return ioread32(lvds->mmio + reg); in rcar_lvds_read()
91 static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data) in rcar_lvds_write() argument
[all …]
/linux-6.12.1/drivers/clk/renesas/
Dr8a77990-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
3 * r8a77990 Clock Pulse Generator / Module Standby and Software Reset
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
7 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
150 DEF_MOD("sys-dmac2", 217, R8A77990_CLK_S3D1),
151 DEF_MOD("sys-dmac1", 218, R8A77990_CLK_S3D1),
[all …]
Dr8a774c0-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a77990-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
149 DEF_MOD("sys-dmac2", 217, R8A774C0_CLK_S3D1),
150 DEF_MOD("sys-dmac1", 218, R8A774C0_CLK_S3D1),
151 DEF_MOD("sys-dmac0", 219, R8A774C0_CLK_S3D1),
162 DEF_MOD("usb3-if0", 328, R8A774C0_CLK_S3D1),
[all …]