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Searched +full:qmc +full:- +full:hdlc (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dfsl,cpm1-scc-qmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
10 - Herve Codina <herve.codina@bootlin.com>
13 The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one
19 - enum:
20 - fsl,mpc885-scc-qmc
21 - fsl,mpc866-scc-qmc
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Dfsl,qe-ucc-qmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC QE QUICC Multichannel Controller (QMC)
10 - Herve Codina <herve.codina@bootlin.com>
13 The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one
19 - enum:
20 - fsl,mpc8321-ucc-qmc
21 - const: fsl,qe-ucc-qmc
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/linux-6.12.1/drivers/net/wan/
Dfsl_qmc_hdlc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale QMC HDLC Device Driver
14 #include <linux/dma-mapping.h>
18 #include <linux/hdlc.h>
27 #include <soc/fsl/qe/qmc.h>
53 return dev_to_hdlc(netdev)->priv; in netdev_to_qmc_hdlc()
61 if (!qmc_hdlc->framer) in qmc_hdlc_framer_set_carrier()
64 guard(mutex)(&qmc_hdlc->carrier_lock); in qmc_hdlc_framer_set_carrier()
66 ret = framer_get_status(qmc_hdlc->framer, &framer_status); in qmc_hdlc_framer_set_carrier()
68 dev_err(qmc_hdlc->dev, "get framer status failed (%d)\n", ret); in qmc_hdlc_framer_set_carrier()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 # Generic HDLC
27 config HDLC config
28 tristate "Generic HDLC layer"
35 <http://www.kernel.org/pub/linux/utils/net/hdlc/>.
36 Generic HDLC driver currently supports raw HDLC, Cisco HDLC, Frame
37 Relay, synchronous Point-to-Point Protocol (PPP) and X.25.
40 module will be called hdlc.
45 tristate "Raw HDLC support"
46 depends on HDLC
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/linux-6.12.1/drivers/soc/fsl/qe/
Dqmc.c1 // SPDX-License-Identifier: GPL-2.0
3 * QMC driver
10 #include <soc/fsl/qe/qmc.h>
12 #include <linux/dma-mapping.h>
14 #include <linux/hdlc.h>
64 /* Tx time-slot assignment table pointer (16 bits) */
76 /* Rx time-slot assignment table pointer (16 bits) */
92 /* A reserved area (0xB0 -> 0xC3) that must be initialized to 0 (QE only) */
95 /* QMC Global Channel specific base (32 bits, QE only) */
129 /* Zero-insertion state (32 bits) */
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
23 protocols: UART, BISYNC, QMC
30 protocols: HDLC, Ethernet, ATM, transparent
49 tristate "CPM/QE QMC support"
55 (QMC)
/linux-6.12.1/include/soc/fsl/qe/
Dqmc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * QMC management
81 } hdlc; member
93 /* Flags available (ORed) for read complete() flags parameter in HDLC mode.
/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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