Home
last modified time | relevance | path

Searched +full:psci +full:- +full:1 (Results 1 – 25 of 314) sorted by relevance

12345678910>>...13

/linux-6.12.1/Documentation/devicetree/bindings/arm/
Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/psci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Power State Coordination Interface (PSCI)
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 Firmware implementing the PSCI functions described in ARM document number
15 processors") can be used by Linux to initiate various CPU-centric power
21 Functions are invoked by trapping to the privilege level of the PSCI
25 r0 => 32-bit Function ID / return value
[all …]
/linux-6.12.1/arch/arm64/boot/dts/cavium/
Dthunder-88xx.dtsi2 * Cavium Thunder DTS file - Thunder SoC description
6 * This file is dual-licensed: you can use it either under the terms
24 * MA 02110-1301 USA
51 compatible = "cavium,thunder-88xx";
52 interrupt-parent = <&gic0>;
53 #address-cells = <2>;
54 #size-cells = <2>;
56 psci {
57 compatible = "arm,psci-0.2";
62 #address-cells = <2>;
[all …]
/linux-6.12.1/include/uapi/linux/
Dpsci.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * ARM Power State and Coordination Interface (PSCI) header
5 * This header holds common PSCI defines and macros shared
16 * PSCI v0.1 interface
18 * The PSCI v0.1 function numbers are implementation defined.
20 * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
22 * to PSCI v0.1.
25 /* PSCI v0.2 interface */
34 #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
44 #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
[all …]
/linux-6.12.1/arch/arm64/boot/dts/amd/
Delba-16core.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Copyright 2020-2023 Advanced Micro Devices, Inc.
8 #address-cells = <1>;
9 #size-cells = <0>;
11 cpu-map {
44 compatible = "arm,cortex-a72";
46 next-level-cache = <&l2_0>;
47 enable-method = "psci";
50 cpu1: cpu@1 {
52 compatible = "arm,cortex-a72";
[all …]
/linux-6.12.1/drivers/cpuidle/
Dcpuidle-psci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
9 #define pr_fmt(fmt) "CPUidle PSCI: " fmt
20 #include <linux/psci.h>
29 #include "cpuidle-psci.h"
58 u32 *states = data->psci_states; in __psci_enter_domain_idle_state()
59 struct device *pd_dev = data->dev; in __psci_enter_domain_idle_state()
65 return -1; in __psci_enter_domain_idle_state()
77 ret = psci_cpu_suspend_enter(state) ? -1 : idx; in __psci_enter_domain_idle_state()
134 dev = per_cpu_ptr(&psci_cpuidle_data, cpu)->dev; in psci_idle_syscore_switch()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhip05.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip05-d02";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
[all …]
Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/marvell/
Darmada-ap810-ap0-octa-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap810-ap0.dtsi"
12 #address-cells = <1>;
13 #size-cells = <0>;
14 compatible = "marvell,armada-ap810-octa";
18 compatible = "arm,cortex-a72";
20 enable-method = "psci";
22 cpu1: cpu@1 {
24 compatible = "arm,cortex-a72";
26 enable-method = "psci";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt6755.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&sysirq>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
[all …]
Dmt6779.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/clock/mt6779-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/mt6779-pinfunc.h>
15 interrupt-parent = <&sysirq>;
16 #address-cells = <2>;
17 #size-cells = <2>;
19 psci {
20 compatible = "arm,psci-0.2";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/
Dnuma.txt6 1 - Introduction
18 2 - numa-node-id
23 a node id is a 32-bit integer.
26 numa-node-id property which contains the node id of the device.
30 numa-node-id = <0>;
32 /* numa node 1 */
33 numa-node-id = <1>;
36 3 - distance-map
39 The optional device tree node distance-map describes the relative
42 - compatible : Should at least contain "numa-distance-map-v1".
[all …]
/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynosautov920.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov920.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,exynos-usi.h>
15 #address-cells = <2>;
16 #size-cells = <1>;
18 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a78-pmu";
37 compatible = "fixed-clock";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/amazon/
Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a72";
[all …]
/linux-6.12.1/drivers/firmware/psci/
Dpsci.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #define pr_fmt(fmt) "psci: " fmt
10 #include <linux/arm-smccc.h>
18 #include <linux/psci.h>
23 #include <uapi/linux/psci.h>
33 * While a 64-bit OS can make calls with SMC32 calling conventions, for some
34 * calls it is necessary to use SMC64 to pass or return 64-bit values.
36 * (native-width) function ID.
47 * a Trusted OS even if it claims to be capable of migration -- doing so will
50 static int resident_cpu = -1;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/sprd/
Dums9620.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
50 compatible = "arm,cortex-a55";
52 enable-method = "psci";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Ds32g3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2021-2024 NXP
7 * Andra-Teodora Ilie <andra.ilie@nxp.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cpu-map {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/amlogic/
Damlogic-t7.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/power/amlogic,t7-pwrc.h>
8 #include "amlogic-t7-reset.h"
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <0x2>;
17 #size-cells = <0x0>;
19 cpu-map {
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/cpu/
Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
22 run-time, can be specified through device tree bindings representing the
[all …]
/linux-6.12.1/arch/arm64/kvm/
Dpsci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - ARM Ltd
7 #include <linux/arm-smccc.h>
24 #define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
38 * same-as WFI (Wait-for-interrupt) emulation. in kvm_psci_vcpu_suspend()
42 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A). in kvm_psci_vcpu_suspend()
44 * Further, we also treat power-down request to be same as in kvm_psci_vcpu_suspend()
45 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2 in kvm_psci_vcpu_suspend()
63 struct kvm *kvm = source_vcpu->kvm; in kvm_psci_vcpu_on()
81 spin_lock(&vcpu->arch.mp_state_lock); in kvm_psci_vcpu_on()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra210-p2530.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 stdout-path = "serial0:115200n8";
24 /delete-property/ dmas;
25 /delete-property/ dma-names;
31 clock-frequency = <400000>;
35 nvidia,invert-interrupt;
41 bus-width = <8>;
42 non-removable;
45 clk32k_in: clock-32k {
46 compatible = "fixed-clock";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/realtek/
Drtd16xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
17 reserved-memory {
18 #address-cells = <1>;
19 #size-cells = <1>;
26 rpc_ringbuf: rpc@1ffe000 {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/arm/
Djuno-r2.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
14 #include "juno-cs-r1r2.dtsi"
18 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
28 stdout-path = "serial0:115200n8";
[all …]
Djuno.dts4 * Copyright (c) 2013-2014 ARM Ltd.
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
30 psci {
[all …]
Djuno-r1.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
14 #include "juno-cs-r1r2.dtsi"
18 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
28 stdout-path = "serial0:115200n8";
[all …]

12345678910>>...13