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/linux-6.12.1/drivers/clk/mstar/
Dclk-msc313-cpupll.c119 unsigned long long prescaled = ((unsigned long long)parent_rate) * MULTIPLIER; in msc313_cpupll_frequencyforreg() local
121 if (prescaled == 0 || reg == 0) in msc313_cpupll_frequencyforreg()
123 return DIV_ROUND_DOWN_ULL(prescaled, reg); in msc313_cpupll_frequencyforreg()
128 unsigned long long prescaled = ((unsigned long long)parent_rate) * MULTIPLIER; in msc313_cpupll_regforfrequecy() local
130 if (prescaled == 0 || rate == 0) in msc313_cpupll_regforfrequecy()
132 return DIV_ROUND_UP_ULL(prescaled, rate); in msc313_cpupll_regforfrequecy()
/linux-6.12.1/Documentation/devicetree/bindings/pwm/
Dti,omap-dmtimer-pwm.yaml31 Legacy clock prescaler for timer. The timer counter is prescaled
/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Drealtek,otto-wdt.yaml14 prescaled clock ticks, which is ca. 43s with a bus clock of 200MHz. The
/linux-6.12.1/Documentation/devicetree/bindings/timer/
Darm,sp804.yaml15 free-running mode. The input clock is shared, but can be gated and prescaled
/linux-6.12.1/drivers/clk/ti/
Dclkt_dpll.c131 * integer pointed to by the m argument should be prescaled by
135 * target_rate) given the current (parent_rate, n, prescaled m)
/linux-6.12.1/drivers/pwm/
Dpwm-berlin.c89 cycles >>= 12; // Prescaled by 4096 in berlin_pwm_config()
Dpwm-microchip-core.c139 * Calculate the duty cycle in multiples of the prescaled period: in mchp_core_pwm_calc_duty()
/linux-6.12.1/drivers/clocksource/
Dtimer-cadence-ttc.c457 * is prescaled by 32 using the interval interrupt. Leave it in ttc_setup_clockevent()
/linux-6.12.1/sound/soc/codecs/
Dmax9867.c380 * and certain PCLK (prescaled MCLK) values. in max9867_dai_hw_params()
/linux-6.12.1/drivers/i2c/busses/
Di2c-omap.c385 /* TRM for 5912 says the I2C clock must be prescaled to be in omap_i2c_init()
/linux-6.12.1/drivers/comedi/drivers/
Dcb_pcidas64.c67 * support prescaled 100khz clock for slow pacing (not available on 6000
83 * 100kHz 'prescaled' clock for slow acquisition,